131 lines
4.0 KiB
Groff
131 lines
4.0 KiB
Groff
.\" Copyright (c) 1998, 1999, Nicolas Souchu
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd March 5, 1998
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.Dt PPC 4 i386
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.Os FreeBSD
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.Sh NAME
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.Nm ppc
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.Nd
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Parallel port chipset driver
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.Sh SYNOPSIS
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.Cd "device ppc0 at isa? port? flags 0xXX irq 7"
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.Pp
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For one or more PPBUS busses:
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.Cd "device ppbus at ppc0"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides low level support to various parallel port chipsets for the
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.Xr ppbus 4
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system.
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.Pp
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During the probe phase,
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.Nm
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detects parallel port chipsets and initializes
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private data according to their operating mode: COMPATIBLE,
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NIBBLE, PS/2, EPP, ECP and other mixed modes.
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If a mode is provided at startup through the
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.Va flags
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variable of the boot
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interface, the operating mode of the chipset is forced according to
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.Va flags
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and the hardware supported modes.
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.Pp
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During the attach phase,
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.Nm
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allocates a ppbus structure, initializes it and calls the ppbus
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attach function.
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.Ss Supported flags
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.Bl -item -offset indent
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.It
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bits 0-3: chipset forced mode(s)
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.Bd -literal
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PPB_COMPATIBLE 0x0 /* Centronics compatible mode */
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PPB_NIBBLE 0x1 /* reverse 4 bit mode */
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PPB_PS2 0x2 /* PS/2 byte mode */
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PPB_EPP 0x4 /* EPP mode, 32 bit */
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PPB_ECP 0x8 /* ECP mode */
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.Ed
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.Pp
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And any mixed values.
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.It
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bit 4: EPP protocol (0 EPP 1.9, 1 EPP 1.7)
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.It
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bit 5: activate IRQ (1 IRQ disabled, 0 IRQ enabled)
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.It
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bit 6: disable chipset specific detection
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.It
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bit 7: disable FIFO detection
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.El
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.Ss Supported chipsets
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Some parallel port chipsets are explicitly supported:
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detection and initialisation code has been written according to
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their datasheets.
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.Bl -bullet -offset indent
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.It
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SMC FDC37C665GT and FDC37C666GT chipsets
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.It
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Natsemi PC873xx-family (PC87332 and PC87306)
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.It
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Winbond W83877xx-family (W83877F and W83877AF)
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.It
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SMC-like chipsets with mixed modes (see
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.Xr ppbus 4 )
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.El
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.Ss Adding support to a new chipset
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You may want to add support for the newest chipset your motherboard was
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sold with.
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For the ISA bus, just retrieve the specs of the chipset and write the
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corresponding
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.Fn ppc_mychipset_detect ""
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function.
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Then add an entry to the general purpose
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.Fn ppc_detect ""
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function.
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.Pp
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Your
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.Fn ppc_mychipset_detect ""
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function should ensure that if the mode field of the
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.Va flags
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boot variable is not null, then the operating
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mode is forced to the given mode and no other mode is available and
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ppb->ppb_avm field contains the available modes of the chipset.
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.Sh SEE ALSO
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.Xr ppbus 4 ,
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.Xr ppi 4
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.Sh BUGS
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The chipset detection process may corrupt your chipset configuration. You may
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disable chipset specific detection by using the above flags.
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 3.0 .
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.Sh AUTHORS
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This manual page was written by
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.An Nicolas Souchu .
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