44d027bb5d
icu is a interrupt concentrator in the CP110 block and gicp is a gic extension to allow interrupts in the CP block to be turned into GIC SPI interrupts Sponsored by: Rubicon Communications, LLC ("Netgate")
290 lines
7.2 KiB
C
290 lines
7.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "pic_if.h"
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#define MV_AP806_GICP_MAX_NIRQS 207
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struct mv_ap806_gicp_softc {
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device_t dev;
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device_t parent;
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struct resource *res;
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ssize_t spi_ranges_cnt;
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uint32_t *spi_ranges;
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};
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static struct ofw_compat_data compat_data[] = {
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{"marvell,ap806-gicp", 1},
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{NULL, 0}
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};
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#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
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#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
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static int
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mv_ap806_gicp_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Marvell GICP");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mv_ap806_gicp_attach(device_t dev)
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{
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struct mv_ap806_gicp_softc *sc;
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phandle_t node, xref, intr_parent;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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/* Look for our parent */
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if ((intr_parent = ofw_bus_find_iparent(node)) == 0) {
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device_printf(dev, "Cannot find our parent interrupt controller\n");
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return (ENXIO);
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}
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if ((sc->parent = OF_device_from_xref(intr_parent)) == NULL) {
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device_printf(dev, "cannot find parent interrupt controller device\n");
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return (ENXIO);
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}
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sc->spi_ranges_cnt = OF_getencprop_alloc(node, "marvell,spi-ranges",
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(void **)&sc->spi_ranges);
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xref = OF_xref_from_node(node);
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if (intr_pic_register(dev, xref) == NULL) {
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device_printf(dev, "Cannot register GICP\n");
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return (ENXIO);
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}
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OF_device_register_xref(xref, dev);
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return (0);
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}
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static int
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mv_ap806_gicp_detach(device_t dev)
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{
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return (EBUSY);
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}
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static int
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mv_ap806_gicp_activate_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data));
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}
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static void
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mv_ap806_gicp_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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PIC_ENABLE_INTR(sc->parent, isrc);
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}
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static void
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mv_ap806_gicp_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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PIC_DISABLE_INTR(sc->parent, isrc);
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}
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static int
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mv_ap806_gicp_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct mv_ap806_gicp_softc *sc;
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struct intr_map_data_fdt *daf;
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uint32_t group, irq_num, irq_type;
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int i;
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sc = device_get_softc(dev);
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if (data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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daf = (struct intr_map_data_fdt *)data;
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if (daf->ncells != 3 || daf->cells[0] >= MV_AP806_GICP_MAX_NIRQS)
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return (EINVAL);
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group = daf->cells[0];
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irq_num = daf->cells[1];
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irq_type = daf->cells[2];
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/* Map the interrupt number to spi number */
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for (i = 0; i < sc->spi_ranges_cnt / 2; i += 2) {
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if (irq_num < sc->spi_ranges[i + 1]) {
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irq_num += sc->spi_ranges[i];
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break;
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}
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irq_num -= sc->spi_ranges[i];
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}
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daf->cells[1] = irq_num - 32;
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return (PIC_MAP_INTR(sc->parent, data, isrcp));
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}
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static int
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mv_ap806_gicp_deactivate_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data));
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}
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static int
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mv_ap806_gicp_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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return (PIC_SETUP_INTR(sc->parent, isrc, res, data));
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}
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static int
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mv_ap806_gicp_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data));
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}
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static void
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mv_ap806_gicp_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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PIC_PRE_ITHREAD(sc->parent, isrc);
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}
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static void
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mv_ap806_gicp_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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PIC_POST_ITHREAD(sc->parent, isrc);
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}
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static void
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mv_ap806_gicp_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_ap806_gicp_softc *sc;
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sc = device_get_softc(dev);
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PIC_POST_FILTER(sc->parent, isrc);
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}
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static device_method_t mv_ap806_gicp_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mv_ap806_gicp_probe),
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DEVMETHOD(device_attach, mv_ap806_gicp_attach),
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DEVMETHOD(device_detach, mv_ap806_gicp_detach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_activate_intr, mv_ap806_gicp_activate_intr),
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DEVMETHOD(pic_disable_intr, mv_ap806_gicp_disable_intr),
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DEVMETHOD(pic_enable_intr, mv_ap806_gicp_enable_intr),
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DEVMETHOD(pic_map_intr, mv_ap806_gicp_map_intr),
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DEVMETHOD(pic_deactivate_intr, mv_ap806_gicp_deactivate_intr),
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DEVMETHOD(pic_setup_intr, mv_ap806_gicp_setup_intr),
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DEVMETHOD(pic_teardown_intr, mv_ap806_gicp_teardown_intr),
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DEVMETHOD(pic_post_filter, mv_ap806_gicp_post_filter),
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DEVMETHOD(pic_post_ithread, mv_ap806_gicp_post_ithread),
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DEVMETHOD(pic_pre_ithread, mv_ap806_gicp_pre_ithread),
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DEVMETHOD_END
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};
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static devclass_t mv_ap806_gicp_devclass;
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static driver_t mv_ap806_gicp_driver = {
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"mv_ap806_gicp",
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mv_ap806_gicp_methods,
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sizeof(struct mv_ap806_gicp_softc),
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};
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EARLY_DRIVER_MODULE(mv_ap806_gicp, simplebus, mv_ap806_gicp_driver,
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mv_ap806_gicp_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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