414 lines
9.7 KiB
C
414 lines
9.7 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
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* Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <sys/gpio.h>
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#include "gpiobus_if.h"
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/spibus/spi.h>
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#include <dev/spibus/spibusvar.h>
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#include "spibus_if.h"
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#include "opt_platform.h"
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <mips/mediatek/mtk_soc.h>
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#include <mips/mediatek/mtk_spi_v1.h>
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#include <dev/flash/mx25lreg.h>
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#undef MTK_SPI_DEBUG
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#ifdef MTK_SPI_DEBUG
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#define dprintf printf
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#else
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#define dprintf(x, arg...)
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#endif
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/*
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* register space access macros
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*/
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#define SPI_WRITE(sc, reg, val) do { \
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bus_write_4(sc->sc_mem_res, (reg), (val)); \
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} while (0)
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#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
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#define SPI_SET_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
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#define SPI_CLEAR_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
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struct mtk_spi_softc {
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device_t sc_dev;
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struct resource *sc_mem_res;
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struct gpiobus_pin *gpio_cs;
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int nonflash;
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};
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static int mtk_spi_probe(device_t);
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static int mtk_spi_attach(device_t);
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static int mtk_spi_detach(device_t);
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static int mtk_spi_wait(struct mtk_spi_softc *);
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static void mtk_spi_chip_activate(struct mtk_spi_softc *);
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static void mtk_spi_chip_deactivate(struct mtk_spi_softc *);
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static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
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static int mtk_spi_transfer(device_t, device_t, struct spi_command *);
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static phandle_t mtk_spi_get_node(device_t, device_t);
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static struct ofw_compat_data compat_data[] = {
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{ "ralink,rt2880-spi", 1 },
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{ "ralink,rt3050-spi", 1 },
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{ "ralink,rt3352-spi", 1 },
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{ "ralink,rt3883-spi", 1 },
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{ "ralink,rt5350-spi", 1 },
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{ "ralink,mt7620a-spi", 1 },
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{ NULL, 0 }
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};
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static int
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mtk_spi_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return(ENXIO);
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device_set_desc(dev, "MTK SPI Controller (v1)");
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return (0);
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}
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static int
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mtk_spi_attach(device_t dev)
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{
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struct mtk_spi_softc *sc = device_get_softc(dev);
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int rid;
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "Could not map memory\n");
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return (ENXIO);
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}
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if (mtk_spi_wait(sc)) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (EBUSY);
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}
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if (ofw_bus_has_prop(dev, "non-flash"))
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sc->nonflash = 1;
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else
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sc->nonflash = 0;
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ofw_gpiobus_parse_gpios(dev, "cs-gpios", &sc->gpio_cs);
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if (sc->gpio_cs != NULL) {
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GPIO_PIN_SETFLAGS(sc->gpio_cs->dev, sc->gpio_cs->pin,
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GPIO_PIN_OUTPUT);
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GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1);
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}
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device_add_child(dev, "spibus", -1);
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return (bus_generic_attach(dev));
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}
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static int
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mtk_spi_detach(device_t dev)
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{
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struct mtk_spi_softc *sc = device_get_softc(dev);
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SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (0);
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}
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static void
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mtk_spi_chip_activate(struct mtk_spi_softc *sc)
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{
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mtk_spi_wait(sc);
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/*
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* Put all CSx to low
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*/
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if (sc->gpio_cs != NULL) {
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GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 0);
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SPI_CLEAR_BITS(sc, MTK_SPICTL, HIZSMOSI);
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} else {
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SPI_CLEAR_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
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}
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}
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static void
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mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
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{
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mtk_spi_wait(sc);
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/*
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* Put all CSx to high
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*/
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if (sc->gpio_cs != NULL) {
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GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1);
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SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI);
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} else {
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SPI_SET_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
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}
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}
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static int
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mtk_spi_wait(struct mtk_spi_softc *sc)
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{
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int i = 1000;
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while (i--) {
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if (!SPI_READ(sc, MTK_SPIBUSY))
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break;
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}
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if (i == 0) {
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printf("busy\n");
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return (1);
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}
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return (0);
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}
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static uint8_t
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mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
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{
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if (mtk_spi_wait(sc))
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return (EBUSY);
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if (write == MTK_SPI_WRITE) {
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SPI_WRITE(sc, MTK_SPIDATA, *data);
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SPI_SET_BITS(sc, MTK_SPICTL, START_WRITE);
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} else {/* MTK_SPI_READ */
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SPI_SET_BITS(sc, MTK_SPICTL, START_READ);
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if (mtk_spi_wait(sc))
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return (EBUSY);
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*data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
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}
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return (0);
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}
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static int
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mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
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{
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struct mtk_spi_softc *sc;
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uint8_t *buf, byte, *tx_buf;
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uint32_t cs, clock, mode;
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int i, sz, error = 0, write = 0;
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int div, clk, cfgreg;
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sc = device_get_softc(dev);
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spibus_get_cs(child, &cs);
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spibus_get_clock(child, &clock);
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spibus_get_mode(child, &mode);
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cs &= ~SPIBUS_CS_HIGH;
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if (cs != 0)
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/* Only 1 CS */
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return (ENXIO);
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cfgreg = MSBFIRST;
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switch(mode) {
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case 0: /* This is workadound because of
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mode 0 not work this soc. */
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case 3:
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cfgreg |= SPICLKPOL | TX_ON_CLK_FALL;
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break;
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case 1:
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cfgreg |= TX_ON_CLK_FALL;
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break;
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case 2:
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cfgreg |= CAPT_ON_CLK_FALL;
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break;
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}
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/*
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* W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
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* Update: divide by 4, DEV2 to fast for flash.
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*/
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if (clock != 0) {
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div = (mtk_soc_get_cpuclk() + (clock - 1)) / clock;
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clk = fls(div) - 2;
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if (clk < 0)
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clk = 0;
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else if (clk > 6)
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clk = 6;
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} else {
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clk = 6;
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}
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SPI_WRITE(sc, MTK_SPICFG, cfgreg | clk);
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if (sc->nonflash == 0) {
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/* There is always a command to transfer. */
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tx_buf = (uint8_t *)(cmd->tx_cmd);
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/* Perform some fixup because MTK dont support duplex SPI */
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switch(tx_buf[0]) {
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case CMD_READ_IDENT:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 3;
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break;
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case CMD_ENTER_4B_MODE:
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case CMD_EXIT_4B_MODE:
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case CMD_WRITE_ENABLE:
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case CMD_WRITE_DISABLE:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 0;
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break;
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case CMD_READ_STATUS:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 1;
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break;
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case CMD_READ:
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case CMD_FAST_READ:
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cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
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break;
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case CMD_SECTOR_ERASE:
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cmd->rx_cmd_sz = 0;
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break;
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case CMD_PAGE_PROGRAM:
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cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
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break;
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}
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}
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mtk_spi_chip_activate(sc);
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if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
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buf = (uint8_t *)(cmd->rx_cmd);
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tx_buf = (uint8_t *)(cmd->tx_cmd);
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sz = cmd->tx_cmd_sz;
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if (sc->nonflash == 0)
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sz += cmd->rx_cmd_sz;
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for (i = 0; i < sz; i++) {
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if(i < cmd->tx_cmd_sz) {
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byte = tx_buf[i];
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error = mtk_spi_txrx(sc, &byte,
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MTK_SPI_WRITE);
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if (error)
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goto mtk_spi_transfer_fail;
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continue;
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}
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error = mtk_spi_txrx(sc, &byte,
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MTK_SPI_READ);
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if (error)
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goto mtk_spi_transfer_fail;
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buf[i] = byte;
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}
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}
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/*
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* Transfer/Receive data
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*/
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if (cmd->tx_data_sz + cmd->rx_data_sz) {
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write = (cmd->tx_data_sz > 0)?1:0;
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buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
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sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
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for (i = 0; i < sz; i++) {
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byte = buf[i];
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error = mtk_spi_txrx(sc, &byte,
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write ? MTK_SPI_WRITE : MTK_SPI_READ);
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if (error)
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goto mtk_spi_transfer_fail;
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buf[i] = byte;
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}
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}
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mtk_spi_transfer_fail:
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mtk_spi_chip_deactivate(sc);
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return (error);
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}
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static phandle_t
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mtk_spi_get_node(device_t bus, device_t dev)
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{
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/* We only have one child, the SPI bus, which needs our own node. */
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return (ofw_bus_get_node(bus));
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}
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static device_method_t mtk_spi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mtk_spi_probe),
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DEVMETHOD(device_attach, mtk_spi_attach),
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DEVMETHOD(device_detach, mtk_spi_detach),
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DEVMETHOD(spibus_transfer, mtk_spi_transfer),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node),
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DEVMETHOD_END
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};
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static driver_t mtk_spi_driver = {
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.name = "spi",
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.methods = mtk_spi_methods,
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.size = sizeof(struct mtk_spi_softc),
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};
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static devclass_t mtk_spi_devclass;
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DRIVER_MODULE(mtk_spi_v1, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
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