7d4dceec10
X700 family of controllers has limited number of available VLAN HW filters. Driver did not handle properly a case when user assigned more VLANs to the interface which had all filters already in use. Fix that by disabling HW filtering when it is impossible to create filters for all requested VLANs. Keep track of registered VLANs using bitstring to be able to re-enable HW filtering when number of requested VLANs drops below the limit. Also switch all allocations to use M_IXL malloc type to ease detecting memory leaks in the driver. Reviewed by: erj Tested by: gowtham.kumar.ks@intel.com MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D28137
265 lines
7.0 KiB
C
265 lines
7.0 KiB
C
/******************************************************************************
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Copyright (c) 2013-2018, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#include <sys/limits.h>
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#include <sys/time.h>
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#include "ixl.h"
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/********************************************************************
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* Manage DMA'able memory.
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*******************************************************************/
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static void
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i40e_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error)
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{
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if (error)
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return;
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*(bus_addr_t *) arg = segs->ds_addr;
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}
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i40e_status
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i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)
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{
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mem->va = malloc(size, M_IXL, M_NOWAIT | M_ZERO);
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return (mem->va == NULL);
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}
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i40e_status
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i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
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{
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free(mem->va, M_IXL);
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mem->va = NULL;
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return (I40E_SUCCESS);
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}
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i40e_status
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i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
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enum i40e_memory_type type __unused, u64 size, u32 alignment)
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{
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device_t dev = ((struct i40e_osdep *)hw->back)->dev;
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int err;
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err = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
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alignment, 0, /* alignment, bounds */
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BUS_SPACE_MAXADDR, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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size, /* maxsize */
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1, /* nsegments */
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size, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockfuncarg */
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&mem->tag);
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if (err != 0) {
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device_printf(dev,
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"i40e_allocate_dma: bus_dma_tag_create failed, "
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"error %u\n", err);
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goto fail_0;
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}
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err = bus_dmamem_alloc(mem->tag, (void **)&mem->va,
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BUS_DMA_NOWAIT | BUS_DMA_ZERO, &mem->map);
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if (err != 0) {
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device_printf(dev,
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"i40e_allocate_dma: bus_dmamem_alloc failed, "
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"error %u\n", err);
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goto fail_1;
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}
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err = bus_dmamap_load(mem->tag, mem->map, mem->va,
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size,
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i40e_dmamap_cb,
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&mem->pa,
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BUS_DMA_NOWAIT);
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if (err != 0) {
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device_printf(dev,
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"i40e_allocate_dma: bus_dmamap_load failed, "
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"error %u\n", err);
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goto fail_2;
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}
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mem->nseg = 1;
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mem->size = size;
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bus_dmamap_sync(mem->tag, mem->map,
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BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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return (I40E_SUCCESS);
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fail_2:
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bus_dmamem_free(mem->tag, mem->va, mem->map);
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fail_1:
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bus_dma_tag_destroy(mem->tag);
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fail_0:
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mem->map = NULL;
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mem->tag = NULL;
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return (err);
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}
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i40e_status
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i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
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{
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bus_dmamap_sync(mem->tag, mem->map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(mem->tag, mem->map);
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bus_dmamem_free(mem->tag, mem->va, mem->map);
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bus_dma_tag_destroy(mem->tag);
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return (I40E_SUCCESS);
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}
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void
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i40e_init_spinlock(struct i40e_spinlock *lock)
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{
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mtx_init(&lock->mutex, "mutex",
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"ixl spinlock", MTX_DEF | MTX_DUPOK);
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}
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void
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i40e_acquire_spinlock(struct i40e_spinlock *lock)
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{
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mtx_lock(&lock->mutex);
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}
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void
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i40e_release_spinlock(struct i40e_spinlock *lock)
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{
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mtx_unlock(&lock->mutex);
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}
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void
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i40e_destroy_spinlock(struct i40e_spinlock *lock)
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{
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if (mtx_initialized(&lock->mutex))
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mtx_destroy(&lock->mutex);
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}
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#ifndef MSEC_2_TICKS
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#define MSEC_2_TICKS(m) max(1, (uint32_t)((hz == 1000) ? \
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(m) : ((uint64_t)(m) * (uint64_t)hz)/(uint64_t)1000))
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#endif
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void
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i40e_msec_pause(int msecs)
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{
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pause("i40e_msec_pause", MSEC_2_TICKS(msecs));
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}
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/*
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* Helper function for debug statement printing
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*/
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void
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i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...)
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{
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va_list args;
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device_t dev;
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if (!(mask & ((struct i40e_hw *)hw)->debug_mask))
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return;
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dev = ((struct i40e_osdep *)hw->back)->dev;
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/* Re-implement device_printf() */
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device_print_prettyname(dev);
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va_start(args, fmt);
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vprintf(fmt, args);
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va_end(args);
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}
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const char *
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ixl_vc_opcode_str(uint16_t op)
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{
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switch (op) {
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case VIRTCHNL_OP_VERSION:
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return ("VERSION");
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case VIRTCHNL_OP_RESET_VF:
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return ("RESET_VF");
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case VIRTCHNL_OP_GET_VF_RESOURCES:
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return ("GET_VF_RESOURCES");
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case VIRTCHNL_OP_CONFIG_TX_QUEUE:
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return ("CONFIG_TX_QUEUE");
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case VIRTCHNL_OP_CONFIG_RX_QUEUE:
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return ("CONFIG_RX_QUEUE");
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case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
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return ("CONFIG_VSI_QUEUES");
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case VIRTCHNL_OP_CONFIG_IRQ_MAP:
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return ("CONFIG_IRQ_MAP");
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case VIRTCHNL_OP_ENABLE_QUEUES:
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return ("ENABLE_QUEUES");
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case VIRTCHNL_OP_DISABLE_QUEUES:
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return ("DISABLE_QUEUES");
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case VIRTCHNL_OP_ADD_ETH_ADDR:
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return ("ADD_ETH_ADDR");
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case VIRTCHNL_OP_DEL_ETH_ADDR:
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return ("DEL_ETH_ADDR");
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case VIRTCHNL_OP_ADD_VLAN:
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return ("ADD_VLAN");
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case VIRTCHNL_OP_DEL_VLAN:
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return ("DEL_VLAN");
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case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
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return ("CONFIG_PROMISCUOUS_MODE");
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case VIRTCHNL_OP_GET_STATS:
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return ("GET_STATS");
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case VIRTCHNL_OP_RSVD:
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return ("RSVD");
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case VIRTCHNL_OP_EVENT:
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return ("EVENT");
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case VIRTCHNL_OP_CONFIG_RSS_KEY:
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return ("CONFIG_RSS_KEY");
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case VIRTCHNL_OP_CONFIG_RSS_LUT:
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return ("CONFIG_RSS_LUT");
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case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
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return ("GET_RSS_HENA_CAPS");
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case VIRTCHNL_OP_SET_RSS_HENA:
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return ("SET_RSS_HENA");
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default:
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return ("UNKNOWN");
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}
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}
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u16
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i40e_read_pci_cfg(struct i40e_hw *hw, u32 reg)
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{
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u16 value;
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value = pci_read_config(((struct i40e_osdep *)hw->back)->dev,
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reg, 2);
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return (value);
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}
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void
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i40e_write_pci_cfg(struct i40e_hw *hw, u32 reg, u16 value)
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{
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pci_write_config(((struct i40e_osdep *)hw->back)->dev,
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reg, value, 2);
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}
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