9f99061ef9
HW keeps track of RX errors using several counters, each for specific type of errors. Report RX errors to OS as sum of all those counters: CRC errors, illegal bytes, checksum, length, undersize, fragment, oversize and jabber errors. There is no HW counter for frames with invalid L3/L4 checksums so add a SW one. Also add a "rx_errors" sysctl with a copy of netstat IERRORS counter value to make it easier accessible from scripts. Reviewed By: erj Tested By: gowtham.kumar.ks@intel.com Sponsored By: Intel Corporation Differential Revision: https://reviews.freebsd.org/D27639
551 lines
15 KiB
C
551 lines
15 KiB
C
/******************************************************************************
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Copyright (c) 2013-2018, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _IXL_H_
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#define _IXL_H_
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#include "opt_inet.h"
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#include "opt_inet6.h"
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#include "opt_rss.h"
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#include "opt_ixl.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf_ring.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sockio.h>
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#include <sys/eventhandler.h>
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#include <sys/syslog.h>
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#include <sys/priv.h>
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#include <sys/bitstring.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_arp.h>
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#include <net/bpf.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/iflib.h>
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#include <net/bpf.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <netinet/in_systm.h>
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#include <netinet/ip.h>
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#include <netinet/ip6.h>
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#include <netinet/tcp.h>
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#include <netinet/tcp_lro.h>
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#include <netinet/udp.h>
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#include <netinet/sctp.h>
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#include <machine/in_cksum.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <sys/proc.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <sys/taskqueue.h>
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#include <sys/pcpu.h>
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#include <sys/smp.h>
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#include <sys/sbuf.h>
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#include <machine/smp.h>
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#include <machine/stdarg.h>
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#ifdef RSS
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#include <net/rss_config.h>
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#include <netinet/in_rss.h>
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#endif
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#include "ifdi_if.h"
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#include "i40e_type.h"
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#include "i40e_prototype.h"
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#include "ixl_debug.h"
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#define PVIDV(vendor, devid, name) \
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PVID(vendor, devid, name " - " IXL_DRIVER_VERSION_STRING)
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/* Tunables */
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/*
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* Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the
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* number of tx/rx descriptors allocated by the driver. Increasing this
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* value allows the driver to queue more operations.
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*
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* Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes.
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* The driver currently always uses 32 byte Rx descriptors.
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*/
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#define IXL_DEFAULT_RING 1024
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#define IXL_MAX_RING 4096
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#define IXL_MIN_RING 64
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#define IXL_RING_INCREMENT 32
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#define IXL_AQ_LEN 256
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#define IXL_AQ_LEN_MAX 1024
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/* Alignment for rings */
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#define DBA_ALIGN 128
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#define MAX_MULTICAST_ADDR 128
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#define IXL_MSIX_BAR 3
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#define IXL_ADM_LIMIT 2
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#define IXL_TSO_SIZE ((255*1024)-1)
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#define IXL_TX_BUF_SZ ((u32) 1514)
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#define IXL_AQ_BUF_SZ ((u32) 4096)
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#define IXL_RX_ITR 0
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#define IXL_TX_ITR 1
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#define IXL_ITR_NONE 3
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#define IXL_QUEUE_EOL 0x7FF
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#define IXL_MIN_FRAME 17
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#define IXL_MAX_FRAME 9728
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#define IXL_MAX_TX_SEGS 8
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#define IXL_MAX_RX_SEGS 5
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#define IXL_MAX_TSO_SEGS 128
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#define IXL_SPARSE_CHAIN 7
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#define IXL_MIN_TSO_MSS 64
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#define IXL_MAX_TSO_MSS 9668
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#define IXL_MAX_DMA_SEG_SIZE ((16 * 1024) - 1)
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#define IXL_RSS_KEY_SIZE_REG 13
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#define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4)
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#define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */
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#define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F
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#define IXL_RSS_VF_LUT_ENTRY_MASK 0xF
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#define IXL_VF_MAX_BUFFER 0x3F80
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#define IXL_VF_MAX_HDR_BUFFER 0x840
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#define IXL_VF_MAX_FRAME 0x3FFF
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/* ERJ: hardware can support ~2k (SW5+) filters between all functions */
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#define IXL_MAX_FILTERS 256
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#define IXL_NVM_VERSION_LO_SHIFT 0
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#define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT)
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#define IXL_NVM_VERSION_HI_SHIFT 12
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#define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT)
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/*
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* Interrupt Moderation parameters
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* Multiply ITR values by 2 for real ITR value
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*/
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#define IXL_MAX_ITR 0x0FF0
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#define IXL_ITR_100K 0x0005
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#define IXL_ITR_20K 0x0019
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#define IXL_ITR_8K 0x003E
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#define IXL_ITR_4K 0x007A
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#define IXL_ITR_1K 0x01F4
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#define IXL_ITR_DYNAMIC 0x8000
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#define IXL_LOW_LATENCY 0
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#define IXL_AVE_LATENCY 1
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#define IXL_BULK_LATENCY 2
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/* MacVlan Flags */
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#define IXL_FILTER_VLAN (u16)(1 << 0)
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#define IXL_FILTER_MC (u16)(1 << 1)
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/* used in the vlan field of the filter when not a vlan */
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#define IXL_VLAN_ANY -1
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/* Maximum number of MAC/VLAN filters supported by HW */
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#define IXL_MAX_VLAN_FILTERS 256
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#define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
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#define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6)
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#define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO)
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/* Misc flags for ixl_vsi.flags */
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#define IXL_FLAGS_KEEP_TSO4 (1 << 0)
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#define IXL_FLAGS_KEEP_TSO6 (1 << 1)
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#define IXL_FLAGS_USES_MSIX (1 << 2)
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#define IXL_FLAGS_IS_VF (1 << 3)
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#define IXL_VSI_IS_PF(v) ((v->flags & IXL_FLAGS_IS_VF) == 0)
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#define IXL_VSI_IS_VF(v) ((v->flags & IXL_FLAGS_IS_VF) != 0)
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#define IXL_VF_RESET_TIMEOUT 100
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#define IXL_VSI_DATA_PORT 0x01
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#define IAVF_MAX_QUEUES 16
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#define IXL_MAX_VSI_QUEUES (2 * (I40E_VSILAN_QTABLE_MAX_INDEX + 1))
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#define IXL_RX_CTX_BASE_UNITS 128
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#define IXL_TX_CTX_BASE_UNITS 128
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#define IXL_PF_PCI_CIAA_VF_DEVICE_STATUS 0xAA
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#define IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK 0x20
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#define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32)
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#define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32))
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#define IXL_MAX_ITR_IDX 3
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#define IXL_END_OF_INTR_LNKLST 0x7FF
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#define IXL_DEFAULT_RSS_HENA_BASE (\
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \
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BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD))
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#define IXL_DEFAULT_RSS_HENA_XL710 IXL_DEFAULT_RSS_HENA_BASE
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#define IXL_DEFAULT_RSS_HENA_X722 (\
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IXL_DEFAULT_RSS_HENA_BASE | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK))
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#define IXL_CAPS \
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(IFCAP_TSO4 | IFCAP_TSO6 | \
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IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \
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IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \
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IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \
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IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | \
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IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO)
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#define IXL_CSUM_TCP \
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(CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP)
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#define IXL_CSUM_UDP \
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(CSUM_IP_UDP|CSUM_IP6_UDP)
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#define IXL_CSUM_SCTP \
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(CSUM_IP_SCTP|CSUM_IP6_SCTP)
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#define IXL_CSUM_IPV4 \
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(CSUM_IP|CSUM_IP_TSO)
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/* Pre-11 counter(9) compatibility */
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#if __FreeBSD_version >= 1100036
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#define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count)
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#define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count)
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#define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count)
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#define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count)
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#define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */
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#define IXL_SET_IBYTES(vsi, count) (vsi)->ibytes = (count)
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#define IXL_SET_OBYTES(vsi, count) (vsi)->obytes = (count)
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#define IXL_SET_IMCASTS(vsi, count) (vsi)->imcasts = (count)
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#define IXL_SET_OMCASTS(vsi, count) (vsi)->omcasts = (count)
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#define IXL_SET_IQDROPS(vsi, count) (vsi)->iqdrops = (count)
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#define IXL_SET_OQDROPS(vsi, count) (vsi)->oqdrops = (count)
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#define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count)
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#else
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#define IXL_SET_IPACKETS(vsi, count) (vsi)->ifp->if_ipackets = (count)
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#define IXL_SET_IERRORS(vsi, count) (vsi)->ifp->if_ierrors = (count)
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#define IXL_SET_OPACKETS(vsi, count) (vsi)->ifp->if_opackets = (count)
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#define IXL_SET_OERRORS(vsi, count) (vsi)->ifp->if_oerrors = (count)
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#define IXL_SET_COLLISIONS(vsi, count) (vsi)->ifp->if_collisions = (count)
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#define IXL_SET_IBYTES(vsi, count) (vsi)->ifp->if_ibytes = (count)
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#define IXL_SET_OBYTES(vsi, count) (vsi)->ifp->if_obytes = (count)
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#define IXL_SET_IMCASTS(vsi, count) (vsi)->ifp->if_imcasts = (count)
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#define IXL_SET_OMCASTS(vsi, count) (vsi)->ifp->if_omcasts = (count)
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#define IXL_SET_IQDROPS(vsi, count) (vsi)->ifp->if_iqdrops = (count)
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#define IXL_SET_OQDROPS(vsi, odrops) (vsi)->ifp->if_snd.ifq_drops = (odrops)
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#define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count)
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#endif
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/* For stats sysctl naming */
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#define IXL_QUEUE_NAME_LEN 32
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MALLOC_DECLARE(M_IXL);
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#define IXL_DEV_ERR(_dev, _format, ...) \
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device_printf(_dev, "%s: " _format " (%s:%d)\n", __func__, ##__VA_ARGS__, __FILE__, __LINE__)
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/*
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*****************************************************************************
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* vendor_info_array
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*
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* This array contains the list of Subvendor/Subdevice IDs on which the driver
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* should load.
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*
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*****************************************************************************
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*/
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typedef struct _ixl_vendor_info_t {
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unsigned int vendor_id;
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unsigned int device_id;
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unsigned int subvendor_id;
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unsigned int subdevice_id;
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unsigned int index;
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} ixl_vendor_info_t;
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/*
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** This struct has multiple uses, multicast
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** addresses, vlans, and mac filters all use it.
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*/
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struct ixl_mac_filter {
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LIST_ENTRY(ixl_mac_filter) ftle;
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u8 macaddr[ETHER_ADDR_LEN];
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s16 vlan;
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u16 flags;
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};
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/*
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* The Transmit ring control struct
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*/
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struct tx_ring {
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struct ixl_tx_queue *que;
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u32 tail;
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struct i40e_tx_desc *tx_base;
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u64 tx_paddr;
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u32 latency;
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u32 packets;
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u32 me;
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/*
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* For reporting completed packet status
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* in descriptor writeback mode
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*/
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qidx_t *tx_rsq;
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qidx_t tx_rs_cidx;
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qidx_t tx_rs_pidx;
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qidx_t tx_cidx_processed;
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/* Used for Dynamic ITR calculation */
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u32 itr;
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u32 bytes;
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/* Soft Stats */
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u64 tx_bytes;
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u64 tx_packets;
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u64 mss_too_small;
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};
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/*
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* The Receive ring control struct
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*/
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struct rx_ring {
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struct ixl_rx_queue *que;
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union i40e_rx_desc *rx_base;
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uint64_t rx_paddr;
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bool discard;
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u32 itr;
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u32 latency;
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u32 mbuf_sz;
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u32 tail;
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u32 me;
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/* Used for Dynamic ITR calculation */
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u32 packets;
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u32 bytes;
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/* Soft stats */
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u64 rx_packets;
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u64 rx_bytes;
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u64 desc_errs;
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u64 csum_errs;
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};
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/*
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** Driver queue structs
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*/
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struct ixl_tx_queue {
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struct ixl_vsi *vsi;
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struct tx_ring txr;
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struct if_irq que_irq;
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u32 msix;
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/* Stats */
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u64 irqs;
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u64 tso;
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};
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struct ixl_rx_queue {
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struct ixl_vsi *vsi;
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struct rx_ring rxr;
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struct if_irq que_irq;
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u32 msix; /* This queue's MSIX vector */
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/* Stats */
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u64 irqs;
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};
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/*
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** Virtual Station Interface
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*/
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LIST_HEAD(ixl_ftl_head, ixl_mac_filter);
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struct ixl_vsi {
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if_ctx_t ctx;
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if_softc_ctx_t shared;
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struct ifnet *ifp;
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device_t dev;
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struct i40e_hw *hw;
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struct ifmedia *media;
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int num_rx_queues;
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int num_tx_queues;
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void *back;
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enum i40e_vsi_type type;
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int id;
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u32 rx_itr_setting;
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u32 tx_itr_setting;
|
|
bool enable_head_writeback;
|
|
|
|
u16 vsi_num;
|
|
bool link_active;
|
|
u16 seid;
|
|
u16 uplink_seid;
|
|
u16 downlink_seid;
|
|
|
|
struct ixl_tx_queue *tx_queues; /* TX queue array */
|
|
struct ixl_rx_queue *rx_queues; /* RX queue array */
|
|
struct if_irq irq;
|
|
u32 link_speed;
|
|
|
|
/* MAC/VLAN Filter list */
|
|
struct ixl_ftl_head ftl;
|
|
u16 num_macs;
|
|
u64 num_hw_filters;
|
|
|
|
/* Contains readylist & stat counter id */
|
|
struct i40e_aqc_vsi_properties_data info;
|
|
|
|
#define IXL_VLANS_MAP_LEN EVL_VLID_MASK + 1
|
|
bitstr_t bit_decl(vlans_map, IXL_VLANS_MAP_LEN);
|
|
u16 num_vlans;
|
|
|
|
/* Per-VSI stats from hardware */
|
|
struct i40e_eth_stats eth_stats;
|
|
struct i40e_eth_stats eth_stats_offsets;
|
|
bool stat_offsets_loaded;
|
|
/* VSI stat counters */
|
|
u64 ipackets;
|
|
u64 ierrors;
|
|
u64 opackets;
|
|
u64 oerrors;
|
|
u64 ibytes;
|
|
u64 obytes;
|
|
u64 imcasts;
|
|
u64 omcasts;
|
|
u64 iqdrops;
|
|
u64 oqdrops;
|
|
u64 noproto;
|
|
|
|
/* Misc. */
|
|
u64 flags;
|
|
/* Stats sysctls for this VSI */
|
|
struct sysctl_oid *vsi_node;
|
|
struct sysctl_ctx_list sysctl_ctx;
|
|
};
|
|
|
|
struct ixl_add_maddr_arg {
|
|
struct ixl_ftl_head to_add;
|
|
struct ixl_vsi *vsi;
|
|
};
|
|
|
|
/*
|
|
** Compare two ethernet addresses
|
|
*/
|
|
static inline bool
|
|
ixl_ether_is_equal(const u8 *ea1, const u8 *ea2)
|
|
{
|
|
return (bcmp(ea1, ea2, ETHER_ADDR_LEN) == 0);
|
|
}
|
|
|
|
/*
|
|
* Return next largest power of 2, unsigned
|
|
*
|
|
* Public domain, from Bit Twiddling Hacks
|
|
*/
|
|
static inline u32
|
|
next_power_of_two(u32 n)
|
|
{
|
|
n--;
|
|
n |= n >> 1;
|
|
n |= n >> 2;
|
|
n |= n >> 4;
|
|
n |= n >> 8;
|
|
n |= n >> 16;
|
|
n++;
|
|
|
|
/* Next power of two > 0 is 1 */
|
|
n += (n == 0);
|
|
|
|
return (n);
|
|
}
|
|
|
|
/*
|
|
* Info for stats sysctls
|
|
*/
|
|
struct ixl_sysctl_info {
|
|
u64 *stat;
|
|
char *name;
|
|
char *description;
|
|
};
|
|
|
|
extern const uint8_t ixl_bcast_addr[ETHER_ADDR_LEN];
|
|
|
|
/* Common function prototypes between PF/VF driver */
|
|
void ixl_debug_core(device_t dev, u32 enabled_mask, u32 mask, char *fmt, ...);
|
|
void ixl_init_tx_ring(struct ixl_vsi *vsi, struct ixl_tx_queue *que);
|
|
void ixl_get_default_rss_key(u32 *);
|
|
const char * i40e_vc_stat_str(struct i40e_hw *hw,
|
|
enum virtchnl_status_code stat_err);
|
|
void ixl_init_tx_rsqs(struct ixl_vsi *vsi);
|
|
void ixl_init_tx_cidx(struct ixl_vsi *vsi);
|
|
u64 ixl_max_vc_speed_to_value(u8 link_speeds);
|
|
void ixl_add_vsi_sysctls(device_t dev, struct ixl_vsi *vsi,
|
|
struct sysctl_ctx_list *ctx, const char *sysctl_name);
|
|
void ixl_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx,
|
|
struct sysctl_oid_list *child,
|
|
struct i40e_eth_stats *eth_stats);
|
|
void ixl_vsi_add_queues_stats(struct ixl_vsi *vsi,
|
|
struct sysctl_ctx_list *ctx);
|
|
#endif /* _IXL_H_ */
|