cd817c0d10
services or PAL procedures. The new implementation is based on specific functions that are known to be called in certain scenarios only. This in particular fixes the PAL call to obtain information about translation registers. In general, the new implementation does not bank on virtual addresses being direct-mapped and will work when the kernel uses PBVM. When new scenarios need to be supported, new functions are added if the existing functions cannot be changed to handle the new scenario. If a single generic implementation is possible, it will become clear in due time. While here, change bootinfo to a pointer type in anticipation of future development.
230 lines
7.5 KiB
C
230 lines
7.5 KiB
C
/*-
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: vmparam.h 1.16 91/01/18$
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*
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* @(#)vmparam.h 8.2 (Berkeley) 4/22/94
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_VMPARAM_H_
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#define _MACHINE_VMPARAM_H_
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/*
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* Virtual memory related constants, all in bytes
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*/
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#ifndef MAXTSIZ
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#define MAXTSIZ (1<<30) /* max text size (1G) */
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#endif
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#ifndef DFLDSIZ
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#define DFLDSIZ (1<<27) /* initial data size (128M) */
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#endif
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#ifndef MAXDSIZ
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#define MAXDSIZ (1<<30) /* max data size (1G) */
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#endif
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#ifndef DFLSSIZ
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#define DFLSSIZ (1<<21) /* initial stack size (2M) */
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#endif
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#ifndef MAXSSIZ
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#define MAXSSIZ (1<<28) /* max stack size (256M) */
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#endif
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#ifndef SGROWSIZ
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#define SGROWSIZ (128UL*1024) /* amount to grow stack */
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#endif
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/*
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* We need region 7 virtual addresses for pagetables.
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*/
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#define UMA_MD_SMALL_ALLOC
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/*
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* The physical address space is sparsely populated.
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*/
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#define VM_PHYSSEG_SPARSE
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/*
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* The number of PHYSSEG entries is equal to the number of phys_avail
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* entries.
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*/
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#define VM_PHYSSEG_MAX 49
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/*
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* Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
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* from which physical pages are allocated and VM_FREEPOOL_DIRECT is
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* the pool from which physical pages for small UMA objects are
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* allocated.
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*/
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#define VM_NFREEPOOL 3
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#define VM_FREEPOOL_CACHE 2
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#define VM_FREEPOOL_DEFAULT 0
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#define VM_FREEPOOL_DIRECT 1
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/*
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* Create one free page list.
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*/
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#define VM_NFREELIST 1
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#define VM_FREELIST_DEFAULT 0
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/*
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* An allocation size of 256MB is supported in order to optimize the
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* use of the identity mappings in region 7 by UMA.
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*/
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#define VM_NFREEORDER 16
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/*
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* Only one memory domain.
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*/
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#ifndef VM_NDOMAIN
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#define VM_NDOMAIN 1
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#endif
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/*
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* Disable superpage reservations.
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*/
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#ifndef VM_NRESERVLEVEL
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#define VM_NRESERVLEVEL 0
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#endif
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#define IA64_VM_MINKERN_REGION 4
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/*
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* Manipulating region bits of an address.
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*/
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#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61)
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#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
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#define IA64_PHYS_TO_RR6(x) ((x) | IA64_RR_BASE(6))
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#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
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/*
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* The Itanium architecture defines that all implementations support at
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* least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented
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* bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in
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* the virtual address range, which extends at most from 0x0004000000000000
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* to 0x1ffbffffffffffff. We define the top half of a region in terms of
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* this worst-case gap.
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*/
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#define IA64_REGION_GAP_START 0x0004000000000000
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#define IA64_REGION_GAP_EXTEND 0x1ffc000000000000
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/*
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* Page size of the identity mappings in region 7.
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*/
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#ifndef LOG2_ID_PAGE_SIZE
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#define LOG2_ID_PAGE_SIZE 28 /* 256M */
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#endif
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#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE)
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#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE))
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#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1)
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/*
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* Parameters for Pre-Boot Virtual Memory (PBVM).
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* The kernel, its modules and metadata are loaded in the PBVM by the loader.
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* The PBVM consists of pages for which the mapping is maintained in a page
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* table. The page table is at least 1 EFI page large (i.e. 4KB), but can be
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* larger to accommodate more PBVM. The maximum page table size is 1MB. With
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* 8 bytes per page table entry, this means that the PBVM has at least 512
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* pages and at most 128K pages.
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* The GNU toolchain (in particular GNU ld) does not support an alignment
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* larger than 64K. This means that we cannot guarantee page alignment for
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* a page size that's larger than 64K. We do want to have text and data in
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* different pages, which means that the maximum usable page size is 64KB.
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* Consequently:
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* The maximum total PBVM size is 8GB -- enough for a DVD image. A page table
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* of a single EFI page (4KB) allows for 32MB of PBVM.
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*
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* The kernel is given the PA and size of the page table that provides the
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* mapping of the PBVM. The page table itself is assumed to be mapped at a
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* known virtual address and using a single translation wired into the CPU.
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* As such, the page table is assumed to be a power of 2 and naturally aligned.
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* The kernel also assumes that a good portion of the kernel text is mapped
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* and wired into the CPU, but does not assume that the mapping covers the
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* whole of PBVM.
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*/
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#define IA64_PBVM_RR IA64_VM_MINKERN_REGION
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#define IA64_PBVM_BASE \
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(IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_GAP_EXTEND)
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#define IA64_PBVM_PGTBL_MAXSZ 1048576
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#define IA64_PBVM_PGTBL \
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(IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ)
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#define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */
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#define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT)
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#define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1)
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/*
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* Mach derived constants
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*/
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/* user/kernel map constants */
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#define VM_MIN_ADDRESS 0
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#define VM_MAXUSER_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION)
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#define VM_MIN_KERNEL_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION + 1)
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#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(IA64_VM_MINKERN_REGION + 2) - 1)
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#define VM_MAX_ADDRESS ~0UL
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#define KERNBASE VM_MAXUSER_ADDRESS
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/*
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* USRSTACK is the top (end) of the user stack. Immediately above the user
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* stack resides the syscall gateway page.
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*/
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#define USRSTACK VM_MAXUSER_ADDRESS
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#define IA64_BACKINGSTORE (USRSTACK - (2 * MAXSSIZ) - PAGE_SIZE)
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/* virtual sizes (bytes) for various kernel submaps */
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#ifndef VM_KMEM_SIZE
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#define VM_KMEM_SIZE (12 * 1024 * 1024)
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#endif
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/*
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* How many physical pages per KVA page allocated.
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* min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE),
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* VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX)
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* is the total KVA space allocated for kmem_map.
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*/
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#ifndef VM_KMEM_SIZE_SCALE
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#define VM_KMEM_SIZE_SCALE (4) /* XXX 8192 byte pages */
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#endif
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/* initial pagein size of beginning of executable file */
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#ifndef VM_INITIAL_PAGEIN
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#define VM_INITIAL_PAGEIN 16
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#endif
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#endif /* !_MACHINE_VMPARAM_H_ */
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