d67580d164
The problem is found using WITNESS option enabled. Sponsored by: Solarflare Communications, Inc. Approved by: gnn (mentor)
802 lines
20 KiB
C
802 lines
20 KiB
C
/*-
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* Copyright (c) 2010-2011 Solarflare Communications, Inc.
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* All rights reserved.
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*
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* This software was developed in part by Philip Paeps under contract for
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* Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/limits.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include "common/efx.h"
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#include "sfxge.h"
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static int
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sfxge_mac_stat_update(struct sfxge_softc *sc)
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{
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struct sfxge_port *port = &sc->port;
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efsys_mem_t *esmp = &(port->mac_stats.dma_buf);
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clock_t now;
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unsigned int count;
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int rc;
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SFXGE_PORT_LOCK_ASSERT_OWNED(port);
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if (port->init_state != SFXGE_PORT_STARTED) {
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rc = 0;
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goto out;
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}
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now = ticks;
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if (now - port->mac_stats.update_time < hz) {
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rc = 0;
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goto out;
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}
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port->mac_stats.update_time = now;
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/* If we're unlucky enough to read statistics wduring the DMA, wait
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* up to 10ms for it to finish (typically takes <500us) */
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for (count = 0; count < 100; ++count) {
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EFSYS_PROBE1(wait, unsigned int, count);
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/* Synchronize the DMA memory for reading */
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bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
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BUS_DMASYNC_POSTREAD);
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/* Try to update the cached counters */
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if ((rc = efx_mac_stats_update(sc->enp, esmp,
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port->mac_stats.decode_buf, NULL)) != EAGAIN)
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goto out;
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DELAY(100);
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}
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rc = ETIMEDOUT;
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out:
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return (rc);
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}
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static int
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sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc = arg1;
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unsigned int id = arg2;
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int rc;
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uint64_t val;
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SFXGE_PORT_LOCK(&sc->port);
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if ((rc = sfxge_mac_stat_update(sc)) == 0)
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val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
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SFXGE_PORT_UNLOCK(&sc->port);
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if (rc == 0)
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rc = SYSCTL_OUT(req, &val, sizeof(val));
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return (rc);
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}
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static void
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sfxge_mac_stat_init(struct sfxge_softc *sc)
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{
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struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
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struct sysctl_oid_list *stat_list;
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unsigned int id;
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const char *name;
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stat_list = SYSCTL_CHILDREN(sc->stats_node);
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/* Initialise the named stats */
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for (id = 0; id < EFX_MAC_NSTATS; id++) {
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name = efx_mac_stat_name(sc->enp, id);
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SYSCTL_ADD_PROC(
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ctx, stat_list,
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OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
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sc, id, sfxge_mac_stat_handler, "Q",
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"");
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}
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}
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#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
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static unsigned int
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sfxge_port_wanted_fc(struct sfxge_softc *sc)
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{
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struct ifmedia_entry *ifm = sc->media.ifm_cur;
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if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO))
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return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE);
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return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) |
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((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0));
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}
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static unsigned int
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sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
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{
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unsigned int wanted_fc, link_fc;
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efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
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return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) |
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((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0);
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}
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#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
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static unsigned int
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sfxge_port_wanted_fc(struct sfxge_softc *sc)
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{
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return (sc->port.wanted_fc);
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}
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static unsigned int
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sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
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{
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return (0);
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}
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static int
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sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc;
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struct sfxge_port *port;
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unsigned int fcntl;
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int error;
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sc = arg1;
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port = &sc->port;
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if (req->newptr != NULL) {
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if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0)
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return (error);
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SFXGE_PORT_LOCK(port);
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if (port->wanted_fc != fcntl) {
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if (port->init_state == SFXGE_PORT_STARTED)
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error = efx_mac_fcntl_set(sc->enp,
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port->wanted_fc,
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B_TRUE);
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if (error == 0)
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port->wanted_fc = fcntl;
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}
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SFXGE_PORT_UNLOCK(port);
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} else {
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SFXGE_PORT_LOCK(port);
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fcntl = port->wanted_fc;
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SFXGE_PORT_UNLOCK(port);
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error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl));
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}
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return (error);
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}
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static int
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sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc;
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struct sfxge_port *port;
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unsigned int wanted_fc, link_fc;
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sc = arg1;
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port = &sc->port;
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SFXGE_PORT_LOCK(port);
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if (port->init_state == SFXGE_PORT_STARTED && SFXGE_LINK_UP(sc))
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efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
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else
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link_fc = 0;
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SFXGE_PORT_UNLOCK(port);
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return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc)));
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}
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#endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */
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static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = {
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[EFX_LINK_10HDX] = IF_Mbps(10),
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[EFX_LINK_10FDX] = IF_Mbps(10),
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[EFX_LINK_100HDX] = IF_Mbps(100),
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[EFX_LINK_100FDX] = IF_Mbps(100),
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[EFX_LINK_1000HDX] = IF_Gbps(1),
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[EFX_LINK_1000FDX] = IF_Gbps(1),
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[EFX_LINK_10000FDX] = IF_Gbps(10),
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};
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void
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sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode)
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{
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struct sfxge_port *port;
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int link_state;
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port = &sc->port;
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if (port->link_mode == mode)
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return;
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port->link_mode = mode;
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/* Push link state update to the OS */
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link_state = (port->link_mode != EFX_LINK_DOWN ?
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LINK_STATE_UP : LINK_STATE_DOWN);
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sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode];
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if_link_state_change(sc->ifnet, link_state);
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}
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static void
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sfxge_mac_poll_work(void *arg, int npending)
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{
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struct sfxge_softc *sc;
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efx_nic_t *enp;
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struct sfxge_port *port;
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efx_link_mode_t mode;
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sc = (struct sfxge_softc *)arg;
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enp = sc->enp;
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port = &sc->port;
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SFXGE_PORT_LOCK(port);
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if (port->init_state != SFXGE_PORT_STARTED)
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goto done;
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/* This may sleep waiting for MCDI completion */
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(void)efx_port_poll(enp, &mode);
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sfxge_mac_link_update(sc, mode);
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done:
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SFXGE_PORT_UNLOCK(port);
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}
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static int
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sfxge_mac_filter_set_locked(struct sfxge_softc *sc)
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{
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unsigned int bucket[EFX_MAC_HASH_BITS];
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struct ifnet *ifp = sc->ifnet;
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struct ifmultiaddr *ifma;
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struct sockaddr_dl *sa;
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efx_nic_t *enp = sc->enp;
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unsigned int index;
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int rc;
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/* Set promisc-unicast and broadcast filter bits */
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if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC),
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B_TRUE)) != 0)
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return (rc);
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/* Set multicast hash filter */
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if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
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for (index = 0; index < EFX_MAC_HASH_BITS; index++)
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bucket[index] = 1;
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} else {
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/* Broadcast frames also go through the multicast
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* filter, and the broadcast address hashes to
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* 0xff. */
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bucket[0xff] = 1;
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if_maddr_rlock(ifp);
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TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
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if (ifma->ifma_addr->sa_family == AF_LINK) {
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sa = (struct sockaddr_dl *)ifma->ifma_addr;
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index = ether_crc32_le(LLADDR(sa), 6) & 0xff;
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bucket[index] = 1;
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}
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}
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if_maddr_runlock(ifp);
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}
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return (efx_mac_hash_set(enp, bucket));
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}
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int
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sfxge_mac_filter_set(struct sfxge_softc *sc)
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{
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struct sfxge_port *port = &sc->port;
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int rc;
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SFXGE_PORT_LOCK(port);
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/*
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* The function may be called without softc_lock held in the
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* case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler
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* checks IFF_DRV_RUNNING flag which implies port started, but
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* it is not guaranteed to remain. softc_lock shared lock can't
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* be held in the case of these ioctls processing, since it
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* results in failure where kernel complains that non-sleepable
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* lock is held in sleeping thread. Both problems are repeatable
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* on LAG with LACP proto bring up.
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*/
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if (port->init_state == SFXGE_PORT_STARTED)
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rc = sfxge_mac_filter_set_locked(sc);
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else
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rc = 0;
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SFXGE_PORT_UNLOCK(port);
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return (rc);
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}
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void
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sfxge_port_stop(struct sfxge_softc *sc)
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{
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struct sfxge_port *port;
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efx_nic_t *enp;
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port = &sc->port;
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enp = sc->enp;
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SFXGE_PORT_LOCK(port);
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KASSERT(port->init_state == SFXGE_PORT_STARTED,
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("port not started"));
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port->init_state = SFXGE_PORT_INITIALIZED;
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port->mac_stats.update_time = 0;
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/* This may call MCDI */
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(void)efx_mac_drain(enp, B_TRUE);
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(void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
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port->link_mode = EFX_LINK_UNKNOWN;
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/* Destroy the common code port object. */
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efx_port_fini(sc->enp);
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SFXGE_PORT_UNLOCK(port);
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}
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int
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sfxge_port_start(struct sfxge_softc *sc)
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{
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uint8_t mac_addr[ETHER_ADDR_LEN];
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struct ifnet *ifp = sc->ifnet;
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struct sfxge_port *port;
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efx_nic_t *enp;
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size_t pdu;
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int rc;
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port = &sc->port;
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enp = sc->enp;
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SFXGE_PORT_LOCK(port);
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KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
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("port not initialized"));
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/* Initialize the port object in the common code. */
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if ((rc = efx_port_init(sc->enp)) != 0)
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goto fail;
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/* Set the SDU */
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pdu = EFX_MAC_PDU(ifp->if_mtu);
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if ((rc = efx_mac_pdu_set(enp, pdu)) != 0)
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goto fail2;
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if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE))
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!= 0)
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goto fail2;
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/* Set the unicast address */
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if_addr_rlock(ifp);
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bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr),
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mac_addr, sizeof(mac_addr));
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if_addr_runlock(ifp);
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if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0)
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goto fail;
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sfxge_mac_filter_set_locked(sc);
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/* Update MAC stats by DMA every second */
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if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
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1000, B_FALSE)) != 0)
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goto fail2;
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if ((rc = efx_mac_drain(enp, B_FALSE)) != 0)
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goto fail3;
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if ((rc = efx_phy_adv_cap_set(sc->enp, sc->media.ifm_cur->ifm_data))
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!= 0)
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goto fail4;
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port->init_state = SFXGE_PORT_STARTED;
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/* Single poll in case there were missing initial events */
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SFXGE_PORT_UNLOCK(port);
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sfxge_mac_poll_work(sc, 0);
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return (0);
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fail4:
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(void)efx_mac_drain(enp, B_TRUE);
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fail3:
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(void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
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0, B_FALSE);
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fail2:
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efx_port_fini(sc->enp);
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fail:
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SFXGE_PORT_UNLOCK(port);
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return (rc);
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}
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static int
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sfxge_phy_stat_update(struct sfxge_softc *sc)
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{
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struct sfxge_port *port = &sc->port;
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efsys_mem_t *esmp = &port->phy_stats.dma_buf;
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clock_t now;
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unsigned int count;
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int rc;
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SFXGE_PORT_LOCK_ASSERT_OWNED(port);
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if (port->init_state != SFXGE_PORT_STARTED) {
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rc = 0;
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goto out;
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}
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now = ticks;
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if (now - port->phy_stats.update_time < hz) {
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rc = 0;
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goto out;
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}
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port->phy_stats.update_time = now;
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/* If we're unlucky enough to read statistics wduring the DMA, wait
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* up to 10ms for it to finish (typically takes <500us) */
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for (count = 0; count < 100; ++count) {
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EFSYS_PROBE1(wait, unsigned int, count);
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/* Synchronize the DMA memory for reading */
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bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
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BUS_DMASYNC_POSTREAD);
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/* Try to update the cached counters */
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if ((rc = efx_phy_stats_update(sc->enp, esmp,
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port->phy_stats.decode_buf)) != EAGAIN)
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goto out;
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DELAY(100);
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}
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rc = ETIMEDOUT;
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out:
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return (rc);
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}
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static int
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sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS)
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{
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struct sfxge_softc *sc = arg1;
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unsigned int id = arg2;
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int rc;
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uint32_t val;
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SFXGE_PORT_LOCK(&sc->port);
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if ((rc = sfxge_phy_stat_update(sc)) == 0)
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val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
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SFXGE_PORT_UNLOCK(&sc->port);
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if (rc == 0)
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rc = SYSCTL_OUT(req, &val, sizeof(val));
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return (rc);
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}
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|
static void
|
|
sfxge_phy_stat_init(struct sfxge_softc *sc)
|
|
{
|
|
struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
|
|
struct sysctl_oid_list *stat_list;
|
|
unsigned int id;
|
|
const char *name;
|
|
uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;
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|
|
|
stat_list = SYSCTL_CHILDREN(sc->stats_node);
|
|
|
|
/* Initialise the named stats */
|
|
for (id = 0; id < EFX_PHY_NSTATS; id++) {
|
|
if (!(stat_mask & ((uint64_t)1 << id)))
|
|
continue;
|
|
name = efx_phy_stat_name(sc->enp, id);
|
|
SYSCTL_ADD_PROC(
|
|
ctx, stat_list,
|
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OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD,
|
|
sc, id, sfxge_phy_stat_handler,
|
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id == EFX_PHY_STAT_OUI ? "IX" : "IU",
|
|
"");
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|
}
|
|
}
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|
|
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void
|
|
sfxge_port_fini(struct sfxge_softc *sc)
|
|
{
|
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struct sfxge_port *port;
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efsys_mem_t *esmp;
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|
|
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port = &sc->port;
|
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esmp = &port->mac_stats.dma_buf;
|
|
|
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KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
|
|
("Port not initialized"));
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|
|
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port->init_state = SFXGE_PORT_UNINITIALIZED;
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|
|
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port->link_mode = EFX_LINK_UNKNOWN;
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|
|
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/* Finish with PHY DMA memory */
|
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sfxge_dma_free(&port->phy_stats.dma_buf);
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free(port->phy_stats.decode_buf, M_SFXGE);
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|
|
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sfxge_dma_free(esmp);
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free(port->mac_stats.decode_buf, M_SFXGE);
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|
|
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SFXGE_PORT_LOCK_DESTROY(port);
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|
|
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port->sc = NULL;
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}
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|
|
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int
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sfxge_port_init(struct sfxge_softc *sc)
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|
{
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struct sfxge_port *port;
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struct sysctl_ctx_list *sysctl_ctx;
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struct sysctl_oid *sysctl_tree;
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efsys_mem_t *mac_stats_buf, *phy_stats_buf;
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int rc;
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|
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port = &sc->port;
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mac_stats_buf = &port->mac_stats.dma_buf;
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phy_stats_buf = &port->phy_stats.dma_buf;
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|
|
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KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED,
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("Port already initialized"));
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|
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port->sc = sc;
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SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev));
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port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t),
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M_SFXGE, M_WAITOK | M_ZERO);
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if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0)
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goto fail;
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sfxge_phy_stat_init(sc);
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|
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sysctl_ctx = device_get_sysctl_ctx(sc->dev);
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sysctl_tree = device_get_sysctl_tree(sc->dev);
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|
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#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
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/* If flow control cannot be configured or reported through
|
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* ifmedia, provide sysctls for it. */
|
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port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
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SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
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"wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
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sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode");
|
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SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
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"link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0,
|
|
sfxge_port_link_fc_handler, "IU", "link flow control mode");
|
|
#endif
|
|
|
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port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t),
|
|
M_SFXGE, M_WAITOK | M_ZERO);
|
|
if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0)
|
|
goto fail2;
|
|
sfxge_mac_stat_init(sc);
|
|
|
|
port->init_state = SFXGE_PORT_INITIALIZED;
|
|
|
|
return (0);
|
|
|
|
fail2:
|
|
free(port->mac_stats.decode_buf, M_SFXGE);
|
|
sfxge_dma_free(phy_stats_buf);
|
|
fail:
|
|
free(port->phy_stats.decode_buf, M_SFXGE);
|
|
SFXGE_PORT_LOCK_DESTROY(port);
|
|
port->sc = NULL;
|
|
return (rc);
|
|
}
|
|
|
|
static int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = {
|
|
[EFX_PHY_MEDIA_CX4] = {
|
|
[EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4,
|
|
},
|
|
[EFX_PHY_MEDIA_KX4] = {
|
|
[EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4,
|
|
},
|
|
[EFX_PHY_MEDIA_XFP] = {
|
|
/* Don't know the module type, but assume SR for now. */
|
|
[EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
|
|
},
|
|
[EFX_PHY_MEDIA_SFP_PLUS] = {
|
|
/* Don't know the module type, but assume SX/SR for now. */
|
|
[EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
|
|
[EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
|
|
},
|
|
[EFX_PHY_MEDIA_BASE_T] = {
|
|
[EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T,
|
|
[EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T,
|
|
[EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX,
|
|
[EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX,
|
|
[EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T,
|
|
[EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T,
|
|
[EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T,
|
|
},
|
|
};
|
|
|
|
static void
|
|
sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct sfxge_softc *sc;
|
|
efx_phy_media_type_t medium_type;
|
|
efx_link_mode_t mode;
|
|
|
|
sc = ifp->if_softc;
|
|
SFXGE_ADAPTER_LOCK(sc);
|
|
|
|
ifmr->ifm_status = IFM_AVALID;
|
|
ifmr->ifm_active = IFM_ETHER;
|
|
|
|
if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) {
|
|
ifmr->ifm_status |= IFM_ACTIVE;
|
|
|
|
efx_phy_media_type_get(sc->enp, &medium_type);
|
|
mode = sc->port.link_mode;
|
|
ifmr->ifm_active |= sfxge_link_mode[medium_type][mode];
|
|
ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc);
|
|
}
|
|
|
|
SFXGE_ADAPTER_UNLOCK(sc);
|
|
}
|
|
|
|
static int
|
|
sfxge_media_change(struct ifnet *ifp)
|
|
{
|
|
struct sfxge_softc *sc;
|
|
struct ifmedia_entry *ifm;
|
|
int rc;
|
|
|
|
sc = ifp->if_softc;
|
|
ifm = sc->media.ifm_cur;
|
|
|
|
SFXGE_ADAPTER_LOCK(sc);
|
|
|
|
if (!SFXGE_RUNNING(sc)) {
|
|
rc = 0;
|
|
goto out;
|
|
}
|
|
|
|
rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE);
|
|
if (rc != 0)
|
|
goto out;
|
|
|
|
rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data);
|
|
out:
|
|
SFXGE_ADAPTER_UNLOCK(sc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
int sfxge_port_ifmedia_init(struct sfxge_softc *sc)
|
|
{
|
|
efx_phy_media_type_t medium_type;
|
|
uint32_t cap_mask, mode_cap_mask;
|
|
efx_link_mode_t mode;
|
|
int mode_ifm, best_mode_ifm = 0;
|
|
int rc;
|
|
|
|
/* We need port state to initialise the ifmedia list. */
|
|
if ((rc = efx_nic_init(sc->enp)) != 0)
|
|
goto out;
|
|
if ((rc = efx_port_init(sc->enp)) != 0)
|
|
goto out2;
|
|
|
|
/*
|
|
* Register ifconfig callbacks for querying and setting the
|
|
* link mode and link status.
|
|
*/
|
|
ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change,
|
|
sfxge_media_status);
|
|
|
|
/*
|
|
* Map firmware medium type and capabilities to ifmedia types.
|
|
* ifmedia does not distinguish between forcing the link mode
|
|
* and disabling auto-negotiation. 1000BASE-T and 10GBASE-T
|
|
* require AN even if only one link mode is enabled, and for
|
|
* 100BASE-TX it is useful even if the link mode is forced.
|
|
* Therefore we never disable auto-negotiation.
|
|
*
|
|
* Also enable and advertise flow control by default.
|
|
*/
|
|
|
|
efx_phy_media_type_get(sc->enp, &medium_type);
|
|
efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
|
|
|
|
EFX_STATIC_ASSERT(EFX_LINK_10HDX == EFX_PHY_CAP_10HDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_10FDX == EFX_PHY_CAP_10FDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_100HDX == EFX_PHY_CAP_100HDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_100FDX == EFX_PHY_CAP_100FDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_1000HDX == EFX_PHY_CAP_1000HDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_1000FDX == EFX_PHY_CAP_1000FDX + 1);
|
|
EFX_STATIC_ASSERT(EFX_LINK_10000FDX == EFX_PHY_CAP_10000FDX + 1);
|
|
|
|
for (mode = EFX_LINK_10HDX; mode <= EFX_LINK_10000FDX; mode++) {
|
|
mode_cap_mask = 1 << (mode - 1);
|
|
mode_ifm = sfxge_link_mode[medium_type][mode];
|
|
|
|
if ((cap_mask & mode_cap_mask) && mode_ifm) {
|
|
mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN);
|
|
|
|
#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
|
|
/* No flow-control */
|
|
ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL);
|
|
|
|
/* Respond-only. If using AN, we implicitly
|
|
* offer symmetric as well, but that doesn't
|
|
* mean we *have* to generate pause frames.
|
|
*/
|
|
mode_cap_mask |= cap_mask & ((1 << EFX_PHY_CAP_PAUSE) |
|
|
(1 << EFX_PHY_CAP_ASYM));
|
|
mode_ifm |= IFM_ETH_RXPAUSE;
|
|
ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL);
|
|
|
|
/* Symmetric */
|
|
mode_cap_mask &= ~(1 << EFX_PHY_CAP_ASYM);
|
|
mode_ifm |= IFM_ETH_TXPAUSE;
|
|
#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
|
|
mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
|
|
#endif
|
|
ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL);
|
|
|
|
/* Link modes are numbered in order of speed,
|
|
* so assume the last one available is the best.
|
|
*/
|
|
best_mode_ifm = mode_ifm;
|
|
}
|
|
}
|
|
|
|
if (cap_mask & (1 << EFX_PHY_CAP_AN)) {
|
|
/* Add autoselect mode. */
|
|
mode_ifm = IFM_ETHER | IFM_AUTO;
|
|
ifmedia_add(&sc->media, mode_ifm,
|
|
cap_mask & ~(1 << EFX_PHY_CAP_ASYM), NULL);
|
|
best_mode_ifm = mode_ifm;
|
|
}
|
|
|
|
if (best_mode_ifm != 0)
|
|
ifmedia_set(&sc->media, best_mode_ifm);
|
|
|
|
/* Now discard port state until interface is started. */
|
|
efx_port_fini(sc->enp);
|
|
out2:
|
|
efx_nic_fini(sc->enp);
|
|
out:
|
|
return (rc);
|
|
}
|