e9dcd83155
Submitted by: kib@ Approved by: hselasky (mentor) MFC after: 1 week Sponsored by: Mellanox Technologies
67 lines
2.3 KiB
C
67 lines
2.3 KiB
C
/*-
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* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef __MLX5_FPGA_TRANS_H__
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#define __MLX5_FPGA_TRANS_H__
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#include <dev/mlx5/mlx5_fpga/sdk.h>
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#include <dev/mlx5/mlx5_fpga/core.h>
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#define MLX5_FPGA_TRANSACTION_MAX_SIZE 1008
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#define MLX5_FPGA_TRANSACTION_SEND_ALIGN_BITS 3
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#define MLX5_FPGA_TRANSACTION_SEND_PAGE_BITS 12
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#define MLX5_FPGA_TID_COUNT 256
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enum mlx5_fpga_direction {
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MLX5_FPGA_READ,
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MLX5_FPGA_WRITE,
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};
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struct mlx5_fpga_transaction {
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struct mlx5_fpga_conn *conn;
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enum mlx5_fpga_direction direction;
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size_t size;
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u64 addr;
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u8 *data;
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void (*complete1)(const struct mlx5_fpga_transaction *complete,
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u8 status);
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};
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int mlx5_fpga_trans_device_init(struct mlx5_fpga_device *fdev);
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void mlx5_fpga_trans_device_cleanup(struct mlx5_fpga_device *fdev);
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int mlx5_fpga_trans_exec(const struct mlx5_fpga_transaction *trans);
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void mlx5_fpga_trans_recv(void *cb_arg, struct mlx5_fpga_dma_buf *buf);
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#endif /* __MLX_FPGA_TRANS_H__ */
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