189 lines
6.6 KiB
C
189 lines
6.6 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.h 5.7 (Berkeley) 5/9/91
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* PATCHES MAGIC LEVEL PATCH THAT GOT US HERE
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* -------------------- ----- ----------------------
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* CURRENT PATCH LEVEL: 3 00158
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* -------------------- ----- ----------------------
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*
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* 15 Feb 93 Julian Elischer Added entries for some scsi adapters
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* 06 Apr 93 Rodney W. Grimes Added com3 and com4, added IO_ISASIZES
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* section
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* 26 Apr 93 Bruce Evans Support for intr-0.1
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*/
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/*
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* ISA Bus conventions
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*/
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#ifndef LOCORE
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#include <sys/cdefs.h>
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unsigned char rtcin __P((int));
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extern unsigned int atdevbase; /* offset in virtual memory of ISA io mem */
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void sysbeep __P((int, int));
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unsigned kbd_8042cmd __P((int));
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struct isa_device;
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int isa_irq_pending __P((struct isa_device *dvp));
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#endif
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/*
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* Input / Output Port Assignments
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*/
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#ifndef IO_BEGIN
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#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */
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/* CPU Board */
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#define IO_DMA1 0x000 /* 8237A DMA Controller #1 */
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#define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */
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#define IO_TIMER1 0x040 /* 8252 Timer #1 */
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#define IO_TIMER2 0x048 /* 8252 Timer #2 */
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#define IO_KBD 0x060 /* 8042 Keyboard */
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#define IO_RTC 0x070 /* RTC */
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#define IO_NMI IO_RTC /* NMI Control */
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#define IO_DMAPG 0x080 /* DMA Page Registers */
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#define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */
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#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */
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#define IO_NPX 0x0F0 /* Numeric Coprocessor */
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/* Cards */
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/* 0x100 - 0x16F Open */
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#define IO_WD2 0x170 /* Secondary Fixed Disk Controller */
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/* 0x178 - 0x1EF Open */
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#define IO_WD1 0x1f0 /* Primary Fixed Disk Controller */
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#define IO_GAME 0x200 /* Game Controller */
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/* 0x208 - 0x277 Open */
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#define IO_LPT2 0x278 /* Parallel Port #2 */
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/* 0x280 - 0x2E7 Open */
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#define IO_COM4 0x2e8 /* COM4 i/o address */
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/* 0x2F0 - 0x2F7 Open */
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#define IO_COM2 0x2f8 /* COM2 i/o address */
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/* 0x300 - 0x32F Open */
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#define IO_BT0 0x330 /* bustek 742a default addr. */
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#define IO_AHA0 0x330 /* adaptec 1542 default addr. */
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#define IO_UHA0 0x330 /* ultrastore 14f default addr. */
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#define IO_BT1 0x334 /* bustek 742a default addr. */
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#define IO_AHA1 0x334 /* adaptec 1542 default addr. */
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/* 0x338 - 0x36F Open */
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#define IO_FD2 0x370 /* secondary base i/o address */
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#define IO_LPT1 0x378 /* Parallel Port #1 */
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/* 0x380 - 0x3AF Open */
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#define IO_MDA 0x3B0 /* Monochome Adapter */
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#define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */
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#define IO_VGA 0x3C0 /* E/VGA Ports */
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#define IO_CGA 0x3D0 /* CGA Ports */
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/* 0x3E0 - 0x3E7 Open */
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#define IO_COM3 0x3e8 /* COM3 i/o address */
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#define IO_FD1 0x3f0 /* primary base i/o address */
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#define IO_COM1 0x3f8 /* COM1 i/o address */
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#define IO_ISAEND 0x3FF /* - 0x3FF End of I/O Registers */
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#endif IO_ISABEGIN
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/*
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* Input / Output Port Sizes - these are from several sources, and tend
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* to be the larger of what was found, ie COM ports can be 4, but some
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* boards do not fully decode the address, thus 8 ports are used.
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*/
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#ifndef IO_ISASIZES
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#define IO_ISASIZES
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#define IO_COMSIZE 8 /* 8250, 16X50 com controllers (4?) */
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#define IO_CGASIZE 16 /* CGA controllers */
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#define IO_DMASIZE 16 /* 8237 DMA controllers */
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#define IO_DPGSIZE 32 /* 74LS612 DMA page reisters */
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#define IO_FDCSIZE 8 /* Nec765 floppy controllers */
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#define IO_WDCSIZE 8 /* WD compatible disk controllers */
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#define IO_GAMSIZE 16 /* AT compatible game controllers */
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#define IO_ICUSIZE 16 /* 8259A interrupt controllers */
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#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */
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#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */
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#define IO_MDASIZE 16 /* Monochrome display controllers */
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#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */
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#define IO_TMRSIZE 16 /* 8253 programmable timers */
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#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */
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#define IO_VGASIZE 16 /* VGA controllers */
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#endif /* IO_ISASIZES */
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/*
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* Input / Output Memory Physical Addresses
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*/
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#ifndef IOM_BEGIN
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#define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */
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#define IOM_END 0x100000 /* End of I/O Memory "hole" */
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#define IOM_SIZE (IOM_END - IOM_BEGIN)
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#endif IOM_BEGIN
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/*
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* RAM Physical Address Space (ignoring the above mentioned "hole")
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*/
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#ifndef RAM_BEGIN
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#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */
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#define RAM_END 0x1000000 /* End of RAM Memory */
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#define RAM_SIZE (RAM_END - RAM_BEGIN)
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#endif RAM_BEGIN
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/*
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* Oddball Physical Memory Addresses
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*/
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#ifndef COMPAQ_RAMRELOC
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#define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */
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#define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */
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#define WEITEK_FPU 0xC0000000 /* WTL 2167 */
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#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */
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#endif COMPAQ_RAMRELOC
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