718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
605 lines
16 KiB
C
605 lines
16 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2008, 2009 Rui Paulo <rpaulo@FreeBSD.org>
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* Copyright (c) 2009 Norikatsu Shigemura <nork@FreeBSD.org>
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* Copyright (c) 2009-2012 Jung-uk Kim <jkim@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the AMD CPU on-die thermal sensors.
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* Initially based on the k8temp Linux driver.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <machine/cpufunc.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#include <dev/pci/pcivar.h>
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#include <x86/pci_cfgreg.h>
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#include <dev/amdsmn/amdsmn.h>
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typedef enum {
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CORE0_SENSOR0,
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CORE0_SENSOR1,
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CORE1_SENSOR0,
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CORE1_SENSOR1,
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CORE0,
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CORE1
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} amdsensor_t;
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struct amdtemp_softc {
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int sc_ncores;
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int sc_ntemps;
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int sc_flags;
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#define AMDTEMP_FLAG_CS_SWAP 0x01 /* ThermSenseCoreSel is inverted. */
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#define AMDTEMP_FLAG_CT_10BIT 0x02 /* CurTmp is 10-bit wide. */
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#define AMDTEMP_FLAG_ALT_OFFSET 0x04 /* CurTmp starts at -28C. */
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int32_t sc_offset;
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int32_t (*sc_gettemp)(device_t, amdsensor_t);
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struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
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struct intr_config_hook sc_ich;
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device_t sc_smn;
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};
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#define VENDORID_AMD 0x1022
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#define DEVICEID_AMD_MISC0F 0x1103
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#define DEVICEID_AMD_MISC10 0x1203
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#define DEVICEID_AMD_MISC11 0x1303
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#define DEVICEID_AMD_MISC12 0x1403
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#define DEVICEID_AMD_MISC14 0x1703
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#define DEVICEID_AMD_MISC15 0x1603
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#define DEVICEID_AMD_MISC16 0x1533
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#define DEVICEID_AMD_MISC16_M30H 0x1583
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#define DEVICEID_AMD_MISC17 0x141d
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#define DEVICEID_AMD_HOSTB17H 0x1450
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static struct amdtemp_product {
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uint16_t amdtemp_vendorid;
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uint16_t amdtemp_deviceid;
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} amdtemp_products[] = {
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{ VENDORID_AMD, DEVICEID_AMD_MISC0F },
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{ VENDORID_AMD, DEVICEID_AMD_MISC10 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC11 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC12 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC14 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC15 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC16 },
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{ VENDORID_AMD, DEVICEID_AMD_MISC16_M30H },
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{ VENDORID_AMD, DEVICEID_AMD_MISC17 },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H },
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};
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/*
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* Reported Temperature Control Register
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*/
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#define AMDTEMP_REPTMP_CTRL 0xa4
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/*
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* Reported Temperature, Family 17h
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*/
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#define AMDTEMP_17H_CUR_TMP 0x59800
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/*
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* Thermaltrip Status Register (Family 0Fh only)
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*/
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#define AMDTEMP_THERMTP_STAT 0xe4
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#define AMDTEMP_TTSR_SELCORE 0x04
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#define AMDTEMP_TTSR_SELSENSOR 0x40
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/*
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* DRAM Configuration High Register
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*/
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#define AMDTEMP_DRAM_CONF_HIGH 0x94 /* Function 2 */
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#define AMDTEMP_DRAM_MODE_DDR3 0x0100
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/*
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* CPU Family/Model Register
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*/
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#define AMDTEMP_CPUID 0xfc
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/*
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* Device methods.
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*/
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static void amdtemp_identify(driver_t *driver, device_t parent);
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static int amdtemp_probe(device_t dev);
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static int amdtemp_attach(device_t dev);
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static void amdtemp_intrhook(void *arg);
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static int amdtemp_detach(device_t dev);
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static int amdtemp_match(device_t dev);
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static int32_t amdtemp_gettemp0f(device_t dev, amdsensor_t sensor);
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static int32_t amdtemp_gettemp(device_t dev, amdsensor_t sensor);
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static int32_t amdtemp_gettemp17h(device_t dev, amdsensor_t sensor);
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static int amdtemp_sysctl(SYSCTL_HANDLER_ARGS);
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static device_method_t amdtemp_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, amdtemp_identify),
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DEVMETHOD(device_probe, amdtemp_probe),
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DEVMETHOD(device_attach, amdtemp_attach),
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DEVMETHOD(device_detach, amdtemp_detach),
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DEVMETHOD_END
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};
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static driver_t amdtemp_driver = {
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"amdtemp",
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amdtemp_methods,
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sizeof(struct amdtemp_softc),
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};
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static devclass_t amdtemp_devclass;
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DRIVER_MODULE(amdtemp, hostb, amdtemp_driver, amdtemp_devclass, NULL, NULL);
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MODULE_VERSION(amdtemp, 1);
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MODULE_DEPEND(amdtemp, amdsmn, 1, 1, 1);
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MODULE_PNP_INFO("U16:vendor;U16:device", pci, amdtemp, amdtemp_products,
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sizeof(amdtemp_products[0]), nitems(amdtemp_products));
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static int
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amdtemp_match(device_t dev)
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{
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int i;
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uint16_t vendor, devid;
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vendor = pci_get_vendor(dev);
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devid = pci_get_device(dev);
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for (i = 0; i < nitems(amdtemp_products); i++) {
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if (vendor == amdtemp_products[i].amdtemp_vendorid &&
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devid == amdtemp_products[i].amdtemp_deviceid)
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return (1);
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}
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return (0);
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}
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static void
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amdtemp_identify(driver_t *driver, device_t parent)
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{
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device_t child;
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/* Make sure we're not being doubly invoked. */
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if (device_find_child(parent, "amdtemp", -1) != NULL)
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return;
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if (amdtemp_match(parent)) {
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child = device_add_child(parent, "amdtemp", -1);
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if (child == NULL)
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device_printf(parent, "add amdtemp child failed\n");
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}
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}
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static int
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amdtemp_probe(device_t dev)
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{
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uint32_t family, model;
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if (resource_disabled("amdtemp", 0))
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return (ENXIO);
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if (!amdtemp_match(device_get_parent(dev)))
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return (ENXIO);
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family = CPUID_TO_FAMILY(cpu_id);
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model = CPUID_TO_MODEL(cpu_id);
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switch (family) {
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case 0x0f:
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if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) ||
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(model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1))
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return (ENXIO);
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break;
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case 0x10:
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case 0x11:
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case 0x12:
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case 0x14:
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case 0x15:
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case 0x16:
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case 0x17:
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break;
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default:
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return (ENXIO);
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}
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device_set_desc(dev, "AMD CPU On-Die Thermal Sensors");
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return (BUS_PROBE_GENERIC);
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}
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static int
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amdtemp_attach(device_t dev)
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{
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char tn[32];
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u_int regs[4];
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struct amdtemp_softc *sc = device_get_softc(dev);
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struct sysctl_ctx_list *sysctlctx;
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struct sysctl_oid *sysctlnode;
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uint32_t cpuid, family, model;
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u_int bid;
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int erratum319, unit;
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erratum319 = 0;
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/*
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* CPUID Register is available from Revision F.
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*/
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cpuid = cpu_id;
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family = CPUID_TO_FAMILY(cpuid);
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model = CPUID_TO_MODEL(cpuid);
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if ((family != 0x0f || model >= 0x40) && family != 0x17) {
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cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
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family = CPUID_TO_FAMILY(cpuid);
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model = CPUID_TO_MODEL(cpuid);
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}
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switch (family) {
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case 0x0f:
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/*
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* Thermaltrip Status Register
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*
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* - ThermSenseCoreSel
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*
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* Revision F & G: 0 - Core1, 1 - Core0
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* Other: 0 - Core0, 1 - Core1
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*
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* - CurTmp
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*
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* Revision G: bits 23-14
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* Other: bits 23-16
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*
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* XXX According to the BKDG, CurTmp, ThermSenseSel and
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* ThermSenseCoreSel bits were introduced in Revision F
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* but CurTmp seems working fine as early as Revision C.
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* However, it is not clear whether ThermSenseSel and/or
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* ThermSenseCoreSel work in undocumented cases as well.
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* In fact, the Linux driver suggests it may not work but
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* we just assume it does until we find otherwise.
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*
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* XXX According to Linux, CurTmp starts at -28C on
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* Socket AM2 Revision G processors, which is not
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* documented anywhere.
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*/
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if (model >= 0x40)
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sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP;
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if (model >= 0x60 && model != 0xc1) {
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do_cpuid(0x80000001, regs);
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bid = (regs[1] >> 9) & 0x1f;
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switch (model) {
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case 0x68: /* Socket S1g1 */
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case 0x6c:
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case 0x7c:
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break;
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case 0x6b: /* Socket AM2 and ASB1 (2 cores) */
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if (bid != 0x0b && bid != 0x0c)
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sc->sc_flags |=
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AMDTEMP_FLAG_ALT_OFFSET;
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break;
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case 0x6f: /* Socket AM2 and ASB1 (1 core) */
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case 0x7f:
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if (bid != 0x07 && bid != 0x09 &&
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bid != 0x0c)
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sc->sc_flags |=
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AMDTEMP_FLAG_ALT_OFFSET;
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break;
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default:
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sc->sc_flags |= AMDTEMP_FLAG_ALT_OFFSET;
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}
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sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT;
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}
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/*
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* There are two sensors per core.
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*/
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sc->sc_ntemps = 2;
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sc->sc_gettemp = amdtemp_gettemp0f;
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break;
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case 0x10:
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/*
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* Erratum 319 Inaccurate Temperature Measurement
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*
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* http://support.amd.com/us/Processor_TechDocs/41322.pdf
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*/
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do_cpuid(0x80000001, regs);
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switch ((regs[1] >> 28) & 0xf) {
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case 0: /* Socket F */
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erratum319 = 1;
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break;
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case 1: /* Socket AM2+ or AM3 */
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if ((pci_cfgregread(pci_get_bus(dev),
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pci_get_slot(dev), 2, AMDTEMP_DRAM_CONF_HIGH, 2) &
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AMDTEMP_DRAM_MODE_DDR3) != 0 || model > 0x04 ||
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(model == 0x04 && (cpuid & CPUID_STEPPING) >= 3))
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break;
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/* XXX 00100F42h (RB-C2) exists in both formats. */
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erratum319 = 1;
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break;
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}
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/* FALLTHROUGH */
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case 0x11:
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case 0x12:
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case 0x14:
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case 0x15:
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case 0x16:
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/*
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* There is only one sensor per package.
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*/
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sc->sc_ntemps = 1;
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sc->sc_gettemp = amdtemp_gettemp;
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break;
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case 0x17:
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sc->sc_ntemps = 1;
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sc->sc_gettemp = amdtemp_gettemp17h;
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sc->sc_smn = device_find_child(
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device_get_parent(dev), "amdsmn", -1);
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if (sc->sc_smn == NULL) {
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if (bootverbose)
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device_printf(dev, "No SMN device found\n");
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return (ENXIO);
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}
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break;
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}
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/* Find number of cores per package. */
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sc->sc_ncores = (amd_feature2 & AMDID2_CMP) != 0 ?
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(cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
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if (sc->sc_ncores > MAXCPU)
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return (ENXIO);
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if (erratum319)
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device_printf(dev,
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"Erratum 319: temperature measurement may be inaccurate\n");
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if (bootverbose)
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device_printf(dev, "Found %d cores and %d sensors.\n",
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sc->sc_ncores,
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sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1);
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/*
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* dev.amdtemp.N tree.
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*/
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unit = device_get_unit(dev);
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snprintf(tn, sizeof(tn), "dev.amdtemp.%d.sensor_offset", unit);
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TUNABLE_INT_FETCH(tn, &sc->sc_offset);
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sysctlctx = device_get_sysctl_ctx(dev);
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SYSCTL_ADD_INT(sysctlctx,
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
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"sensor_offset", CTLFLAG_RW, &sc->sc_offset, 0,
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"Temperature sensor offset");
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sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
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"core0", CTLFLAG_RD, 0, "Core 0");
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SYSCTL_ADD_PROC(sysctlctx,
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SYSCTL_CHILDREN(sysctlnode),
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OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
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dev, CORE0_SENSOR0, amdtemp_sysctl, "IK",
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"Core 0 / Sensor 0 temperature");
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if (sc->sc_ntemps > 1) {
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SYSCTL_ADD_PROC(sysctlctx,
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SYSCTL_CHILDREN(sysctlnode),
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OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
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dev, CORE0_SENSOR1, amdtemp_sysctl, "IK",
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"Core 0 / Sensor 1 temperature");
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if (sc->sc_ncores > 1) {
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sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "core1", CTLFLAG_RD, 0, "Core 1");
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SYSCTL_ADD_PROC(sysctlctx,
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SYSCTL_CHILDREN(sysctlnode),
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OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
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dev, CORE1_SENSOR0, amdtemp_sysctl, "IK",
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"Core 1 / Sensor 0 temperature");
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SYSCTL_ADD_PROC(sysctlctx,
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SYSCTL_CHILDREN(sysctlnode),
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OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
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dev, CORE1_SENSOR1, amdtemp_sysctl, "IK",
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"Core 1 / Sensor 1 temperature");
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}
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}
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/*
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* Try to create dev.cpu sysctl entries and setup intrhook function.
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* This is needed because the cpu driver may be loaded late on boot,
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* after us.
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*/
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amdtemp_intrhook(dev);
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sc->sc_ich.ich_func = amdtemp_intrhook;
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sc->sc_ich.ich_arg = dev;
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if (config_intrhook_establish(&sc->sc_ich) != 0) {
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device_printf(dev, "config_intrhook_establish failed!\n");
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return (ENXIO);
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}
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return (0);
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}
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void
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amdtemp_intrhook(void *arg)
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{
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struct amdtemp_softc *sc;
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struct sysctl_ctx_list *sysctlctx;
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device_t dev = (device_t)arg;
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device_t acpi, cpu, nexus;
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amdsensor_t sensor;
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int i;
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sc = device_get_softc(dev);
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/*
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* dev.cpu.N.temperature.
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*/
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nexus = device_find_child(root_bus, "nexus", 0);
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acpi = device_find_child(nexus, "acpi", 0);
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for (i = 0; i < sc->sc_ncores; i++) {
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if (sc->sc_sysctl_cpu[i] != NULL)
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continue;
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cpu = device_find_child(acpi, "cpu",
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device_get_unit(dev) * sc->sc_ncores + i);
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if (cpu != NULL) {
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sysctlctx = device_get_sysctl_ctx(cpu);
|
|
|
|
sensor = sc->sc_ntemps > 1 ?
|
|
(i == 0 ? CORE0 : CORE1) : CORE0_SENSOR0;
|
|
sc->sc_sysctl_cpu[i] = SYSCTL_ADD_PROC(sysctlctx,
|
|
SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)),
|
|
OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD,
|
|
dev, sensor, amdtemp_sysctl, "IK",
|
|
"Current temparature");
|
|
}
|
|
}
|
|
if (sc->sc_ich.ich_arg != NULL)
|
|
config_intrhook_disestablish(&sc->sc_ich);
|
|
}
|
|
|
|
int
|
|
amdtemp_detach(device_t dev)
|
|
{
|
|
struct amdtemp_softc *sc = device_get_softc(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < sc->sc_ncores; i++)
|
|
if (sc->sc_sysctl_cpu[i] != NULL)
|
|
sysctl_remove_oid(sc->sc_sysctl_cpu[i], 1, 0);
|
|
|
|
/* NewBus removes the dev.amdtemp.N tree by itself. */
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
amdtemp_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
device_t dev = (device_t)arg1;
|
|
struct amdtemp_softc *sc = device_get_softc(dev);
|
|
amdsensor_t sensor = (amdsensor_t)arg2;
|
|
int32_t auxtemp[2], temp;
|
|
int error;
|
|
|
|
switch (sensor) {
|
|
case CORE0:
|
|
auxtemp[0] = sc->sc_gettemp(dev, CORE0_SENSOR0);
|
|
auxtemp[1] = sc->sc_gettemp(dev, CORE0_SENSOR1);
|
|
temp = imax(auxtemp[0], auxtemp[1]);
|
|
break;
|
|
case CORE1:
|
|
auxtemp[0] = sc->sc_gettemp(dev, CORE1_SENSOR0);
|
|
auxtemp[1] = sc->sc_gettemp(dev, CORE1_SENSOR1);
|
|
temp = imax(auxtemp[0], auxtemp[1]);
|
|
break;
|
|
default:
|
|
temp = sc->sc_gettemp(dev, sensor);
|
|
break;
|
|
}
|
|
error = sysctl_handle_int(oidp, &temp, 0, req);
|
|
|
|
return (error);
|
|
}
|
|
|
|
#define AMDTEMP_ZERO_C_TO_K 2731
|
|
|
|
static int32_t
|
|
amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
|
|
{
|
|
struct amdtemp_softc *sc = device_get_softc(dev);
|
|
uint32_t mask, offset, temp;
|
|
|
|
/* Set Sensor/Core selector. */
|
|
temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 1);
|
|
temp &= ~(AMDTEMP_TTSR_SELCORE | AMDTEMP_TTSR_SELSENSOR);
|
|
switch (sensor) {
|
|
case CORE0_SENSOR1:
|
|
temp |= AMDTEMP_TTSR_SELSENSOR;
|
|
/* FALLTHROUGH */
|
|
case CORE0_SENSOR0:
|
|
case CORE0:
|
|
if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0)
|
|
temp |= AMDTEMP_TTSR_SELCORE;
|
|
break;
|
|
case CORE1_SENSOR1:
|
|
temp |= AMDTEMP_TTSR_SELSENSOR;
|
|
/* FALLTHROUGH */
|
|
case CORE1_SENSOR0:
|
|
case CORE1:
|
|
if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0)
|
|
temp |= AMDTEMP_TTSR_SELCORE;
|
|
break;
|
|
}
|
|
pci_write_config(dev, AMDTEMP_THERMTP_STAT, temp, 1);
|
|
|
|
mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;
|
|
offset = (sc->sc_flags & AMDTEMP_FLAG_ALT_OFFSET) != 0 ? 28 : 49;
|
|
temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
|
|
temp = ((temp >> 14) & mask) * 5 / 2;
|
|
temp += AMDTEMP_ZERO_C_TO_K + (sc->sc_offset - offset) * 10;
|
|
|
|
return (temp);
|
|
}
|
|
|
|
static int32_t
|
|
amdtemp_gettemp(device_t dev, amdsensor_t sensor)
|
|
{
|
|
struct amdtemp_softc *sc = device_get_softc(dev);
|
|
uint32_t temp;
|
|
|
|
temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4);
|
|
temp = ((temp >> 21) & 0x7ff) * 5 / 4;
|
|
temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
|
|
|
|
return (temp);
|
|
}
|
|
|
|
static int32_t
|
|
amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
|
|
{
|
|
struct amdtemp_softc *sc = device_get_softc(dev);
|
|
uint32_t temp;
|
|
int error;
|
|
|
|
error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &temp);
|
|
KASSERT(error == 0, ("amdsmn_read"));
|
|
|
|
temp = ((temp >> 21) & 0x7ff) * 5 / 4;
|
|
temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
|
|
|
|
return (temp);
|
|
}
|