a426b286c8
patch for r263619, and unify all the URLs to point to svnweb.
70 lines
2.9 KiB
Diff
70 lines
2.9 KiB
Diff
Pull in r199024 from upstream llvm trunk (by Venkatraman Govindaraju):
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[Sparc] Add missing processor types: v7 and niagara
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Introduced here: http://svnweb.freebsd.org/changeset/base/262261
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Index: lib/Target/Sparc/Sparc.td
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===================================================================
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--- lib/Target/Sparc/Sparc.td
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+++ lib/Target/Sparc/Sparc.td
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@@ -56,6 +56,7 @@ class Proc<string Name, list<SubtargetFeature> Fea
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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+def : Proc<"v7", []>;
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def : Proc<"v8", []>;
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def : Proc<"supersparc", []>;
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def : Proc<"sparclite", []>;
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@@ -67,7 +68,10 @@ def : Proc<"tsc701", []>;
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def : Proc<"v9", [FeatureV9]>;
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def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>;
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def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
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-def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
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+def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated]>;
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+def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated]>;
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+def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated]>;
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+def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated]>;
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def SparcAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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Index: lib/Target/Sparc/SparcSubtarget.cpp
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===================================================================
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--- lib/Target/Sparc/SparcSubtarget.cpp
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+++ lib/Target/Sparc/SparcSubtarget.cpp
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@@ -35,13 +35,8 @@ SparcSubtarget::SparcSubtarget(const std::string &
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// Determine default and user specified characteristics
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std::string CPUName = CPU;
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- if (CPUName.empty()) {
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- if (is64Bit)
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- CPUName = "v9";
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- else
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- CPUName = "v8";
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- }
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- IsV9 = CPUName == "v9";
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+ if (CPUName.empty())
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+ CPUName = (is64Bit) ? "v9" : "v8";
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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Index: test/CodeGen/SPARC/ctpop.ll
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===================================================================
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--- test/CodeGen/SPARC/ctpop.ll
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+++ test/CodeGen/SPARC/ctpop.ll
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@@ -1,6 +1,13 @@
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; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
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; RUN: llc < %s -march=sparc -mattr=+v9 | FileCheck %s -check-prefix=V9
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-; RUN: llc < %s -march=sparcv9 | FileCheck %s -check-prefix=SPARC64
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+; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=niagara | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
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+; RUN: llc < %s -march=sparcv9 | FileCheck %s -check-prefix=SPARC64
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declare i32 @llvm.ctpop.i32(i32)
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