367 lines
9.3 KiB
C
367 lines
9.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2020 BusyTech
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/eventhandler.h>
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#include <sys/kernel.h>
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#include <sys/types.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/rman.h>
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#include <sys/resource.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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/* Registers */
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#define DWWDT_CR 0x00
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#define DWWDT_CR_WDT_EN (1 << 0)
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#define DWWDT_CR_RESP_MODE (1 << 1)
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#define DWWDT_TORR 0x04
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#define DWWDT_CCVR 0x08
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#define DWWDT_CRR 0x0C
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#define DWWDT_CRR_KICK 0x76
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#define DWWDT_STAT 0x10
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#define DWWDT_STAT_STATUS 0x01
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#define DWWDT_EOI 0x14
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#define DWWDT_READ4(sc, reg) bus_read_4((sc)->sc_mem_res, (reg))
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#define DWWDT_WRITE4(sc, reg, val) \
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bus_write_4((sc)->sc_mem_res, (reg), (val))
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/*
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* 47 = 16 (timeout shift of dwwdt) + 30 (1s ~= 2 ** 30ns) + 1
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* (pre-restart delay)
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*/
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#define DWWDT_EXP_OFFSET 47
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struct dwwdt_softc {
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device_t sc_dev;
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struct resource *sc_mem_res;
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struct resource *sc_irq_res;
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void *sc_intr_cookie;
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clk_t sc_clk;
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uint64_t sc_clk_freq;
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eventhandler_tag sc_evtag;
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int sc_mem_rid;
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int sc_irq_rid;
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enum {
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DWWDT_STOPPED,
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DWWDT_RUNNING,
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} sc_status;
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};
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static devclass_t dwwdt_devclass;
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static struct ofw_compat_data compat_data[] = {
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{ "snps,dw-wdt", 1 },
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{ NULL, 0 }
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};
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SYSCTL_NODE(_dev, OID_AUTO, dwwdt, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
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"Synopsys Designware watchdog timer");
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/* Setting this to 0 enables full restart mode. */
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static uint32_t dwwdt_prevent_restart = 1;
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SYSCTL_UINT(_dev_dwwdt, OID_AUTO, prevent_restart, CTLFLAG_RW | CTLFLAG_MPSAFE,
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&dwwdt_prevent_restart, 1,
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"Prevent system restart (0 - Disabled; 1 - Enabled)");
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static uint32_t dwwdt_debug_enabled = 0;
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SYSCTL_UINT(_dev_dwwdt, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_MPSAFE,
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&dwwdt_debug_enabled, 1, "Debug mode (0 - Disabled; 1 - Enabled)");
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static int dwwdt_probe(device_t);
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static int dwwdt_attach(device_t);
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static int dwwdt_detach(device_t);
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static int dwwdt_shutdown(device_t);
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static void dwwdt_intr(void *);
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static void dwwdt_event(void *, unsigned int, int *);
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/* Helpers */
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static inline void dwwdt_start(struct dwwdt_softc *sc);
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static inline bool dwwdt_started(const struct dwwdt_softc *sc);
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static inline void dwwdt_stop(struct dwwdt_softc *sc);
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static inline void dwwdt_set_timeout(const struct dwwdt_softc *sc, int val);
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static void dwwdt_debug(device_t);
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static void
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dwwdt_debug(device_t dev)
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{
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/*
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* Reading from EOI may clear interrupt flag.
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*/
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const struct dwwdt_softc *sc = device_get_softc(dev);
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device_printf(dev, "Registers dump: \n");
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device_printf(dev, " CR: %08x\n", DWWDT_READ4(sc, DWWDT_CR));
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device_printf(dev, " CCVR: %08x\n", DWWDT_READ4(sc, DWWDT_CCVR));
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device_printf(dev, " CRR: %08x\n", DWWDT_READ4(sc, DWWDT_CRR));
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device_printf(dev, " STAT: %08x\n", DWWDT_READ4(sc, DWWDT_STAT));
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device_printf(dev, "Clock: %s\n", clk_get_name(sc->sc_clk));
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device_printf(dev, " FREQ: %lu\n", sc->sc_clk_freq);
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}
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static inline bool
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dwwdt_started(const struct dwwdt_softc *sc)
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{
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/* CR_WDT_E bit can be clear only by full CPU reset. */
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return ((DWWDT_READ4(sc, DWWDT_CR) & DWWDT_CR_WDT_EN) != 0);
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}
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static void inline
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dwwdt_start(struct dwwdt_softc *sc)
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{
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uint32_t val;
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/* Enable watchdog */
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val = DWWDT_READ4(sc, DWWDT_CR);
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val |= DWWDT_CR_WDT_EN | DWWDT_CR_RESP_MODE;
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DWWDT_WRITE4(sc, DWWDT_CR, val);
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sc->sc_status = DWWDT_RUNNING;
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}
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static void inline
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dwwdt_stop(struct dwwdt_softc *sc)
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{
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sc->sc_status = DWWDT_STOPPED;
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dwwdt_set_timeout(sc, 0x0f);
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}
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static void inline
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dwwdt_set_timeout(const struct dwwdt_softc *sc, int val)
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{
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DWWDT_WRITE4(sc, DWWDT_TORR, val);
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DWWDT_WRITE4(sc, DWWDT_CRR, DWWDT_CRR_KICK);
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}
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static void
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dwwdt_intr(void *arg)
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{
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struct dwwdt_softc *sc = arg;
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KASSERT((DWWDT_READ4(sc, DWWDT_STAT) & DWWDT_STAT_STATUS) != 0,
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("Missing interrupt status bit?"));
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if (dwwdt_prevent_restart != 0 || sc->sc_status == DWWDT_STOPPED) {
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/*
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* Confirm interrupt reception. Restart counter.
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* This also emulates stopping watchdog.
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*/
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(void)DWWDT_READ4(sc, DWWDT_EOI);
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}
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}
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static void
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dwwdt_event(void *arg, unsigned int cmd, int *error)
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{
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struct dwwdt_softc *sc = arg;
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const int exponent = flsl(sc->sc_clk_freq);
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int timeout;
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int val;
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timeout = cmd & WD_INTERVAL;
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val = MAX(0, timeout + exponent - DWWDT_EXP_OFFSET);
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dwwdt_stop(sc);
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if (cmd == 0 || val > 0x0f) {
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/*
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* Set maximum time between interrupts and Leave watchdog
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* disabled.
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*/
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return;
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}
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dwwdt_set_timeout(sc, val);
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dwwdt_start(sc);
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*error = 0;
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if (dwwdt_debug_enabled)
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dwwdt_debug(sc->sc_dev);
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}
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static int
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dwwdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "Synopsys Designware watchdog timer");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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dwwdt_attach(device_t dev)
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{
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struct dwwdt_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_mem_rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->sc_mem_rid, RF_ACTIVE);
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if (sc->sc_mem_res == NULL) {
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device_printf(dev, "cannot allocate memory resource\n");
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goto err_no_mem;
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}
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sc->sc_irq_rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->sc_irq_rid, RF_ACTIVE);
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if (sc->sc_irq_res == NULL) {
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device_printf(dev, "cannot allocate ireq resource\n");
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goto err_no_irq;
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}
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sc->sc_intr_cookie = NULL;
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if (bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE | INTR_TYPE_MISC,
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NULL, dwwdt_intr, sc, &sc->sc_intr_cookie) != 0) {
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device_printf(dev, "cannot setup interrupt routine\n");
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goto err_no_intr;
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}
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if (clk_get_by_ofw_index(dev, 0, 0, &sc->sc_clk) != 0) {
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device_printf(dev, "cannot find clock\n");
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goto err_no_clock;
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}
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if (clk_enable(sc->sc_clk) != 0) {
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device_printf(dev, "cannot enable clock\n");
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goto err_no_freq;
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}
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if (clk_get_freq(sc->sc_clk, &sc->sc_clk_freq) != 0) {
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device_printf(dev, "cannot get clock frequency\n");
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goto err_no_freq;
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}
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if (sc->sc_clk_freq == 0UL)
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goto err_no_freq;
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sc->sc_evtag = EVENTHANDLER_REGISTER(watchdog_list, dwwdt_event, sc, 0);
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sc->sc_status = DWWDT_STOPPED;
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return (bus_generic_attach(dev));
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err_no_freq:
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clk_release(sc->sc_clk);
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err_no_clock:
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_cookie);
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err_no_intr:
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bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, sc->sc_irq_res);
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err_no_irq:
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
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sc->sc_mem_res);
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err_no_mem:
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return (ENXIO);
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}
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static int
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dwwdt_detach(device_t dev)
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{
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struct dwwdt_softc *sc = device_get_softc(dev);
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if (dwwdt_started(sc)) {
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/*
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* Once started it cannot be stopped. Prevent module unload
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* instead.
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*/
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return (EBUSY);
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}
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EVENTHANDLER_DEREGISTER(watchdog_list, sc->sc_evtag);
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sc->sc_evtag = NULL;
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if (sc->sc_clk != NULL)
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clk_release(sc->sc_clk);
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if (sc->sc_intr_cookie != NULL)
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_cookie);
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if (sc->sc_irq_res) {
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bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
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sc->sc_irq_res);
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}
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if (sc->sc_mem_res) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
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sc->sc_mem_res);
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}
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return (bus_generic_detach(dev));
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}
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static int
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dwwdt_shutdown(device_t dev)
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{
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struct dwwdt_softc *sc;
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sc = device_get_softc(dev);
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/* Prevent restarts during shutdown. */
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dwwdt_prevent_restart = 1;
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dwwdt_stop(sc);
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return (bus_generic_shutdown(dev));
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}
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static device_method_t dwwdt_methods[] = {
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DEVMETHOD(device_probe, dwwdt_probe),
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DEVMETHOD(device_attach, dwwdt_attach),
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DEVMETHOD(device_detach, dwwdt_detach),
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DEVMETHOD(device_shutdown, dwwdt_shutdown),
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{0, 0}
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};
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static driver_t dwwdt_driver = {
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"dwwdt",
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dwwdt_methods,
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sizeof(struct dwwdt_softc),
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};
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DRIVER_MODULE(dwwdt, simplebus, dwwdt_driver, dwwdt_devclass, NULL, NULL);
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MODULE_VERSION(dwwdt, 1);
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OFWBUS_PNP_INFO(compat_data);
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