455fa6518a
This update brings few features:
o Support for the setmaster/dropmaster ioctls. For instance, they
are used to run multiple X servers simultaneously.
o Support for minor devices. The only user-visible change is a new
entry in /dev/dri but it is useless at the moment. This is a
first step to support render nodes [1].
The main benefit is to greatly reduce the diff with Linux (at the
expense of an unreadable commit diff). Hopefully, next upgrades will be
easier.
No updates were made to the drivers, beside adapting them to API
changes.
[1] https://en.wikipedia.org/wiki/Direct_Rendering_Manager#Render_nodes
Tested by: Many people
MFC after: 1 month
Relnotes: yes
466 lines
12 KiB
C
466 lines
12 KiB
C
/*
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* Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
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* Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
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* Copyright (c) 2008 Red Hat Inc.
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* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
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* Copyright (c) 2007-2008 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _DRM_MODE_H
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#define _DRM_MODE_H
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#include <dev/drm2/drm_os_freebsd.h>
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#define DRM_DISPLAY_INFO_LEN 32
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#define DRM_CONNECTOR_NAME_LEN 32
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#define DRM_DISPLAY_MODE_LEN 32
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#define DRM_PROP_NAME_LEN 32
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#define DRM_MODE_TYPE_BUILTIN (1<<0)
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#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
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#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
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#define DRM_MODE_TYPE_PREFERRED (1<<3)
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#define DRM_MODE_TYPE_DEFAULT (1<<4)
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#define DRM_MODE_TYPE_USERDEF (1<<5)
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#define DRM_MODE_TYPE_DRIVER (1<<6)
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/* Video mode flags */
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/* bit compatible with the xorg definitions. */
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#define DRM_MODE_FLAG_PHSYNC (1<<0)
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#define DRM_MODE_FLAG_NHSYNC (1<<1)
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#define DRM_MODE_FLAG_PVSYNC (1<<2)
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#define DRM_MODE_FLAG_NVSYNC (1<<3)
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#define DRM_MODE_FLAG_INTERLACE (1<<4)
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#define DRM_MODE_FLAG_DBLSCAN (1<<5)
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#define DRM_MODE_FLAG_CSYNC (1<<6)
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#define DRM_MODE_FLAG_PCSYNC (1<<7)
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#define DRM_MODE_FLAG_NCSYNC (1<<8)
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#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
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#define DRM_MODE_FLAG_BCAST (1<<10)
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#define DRM_MODE_FLAG_PIXMUX (1<<11)
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#define DRM_MODE_FLAG_DBLCLK (1<<12)
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#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
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/* DPMS flags */
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/* bit compatible with the xorg definitions. */
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#define DRM_MODE_DPMS_ON 0
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#define DRM_MODE_DPMS_STANDBY 1
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#define DRM_MODE_DPMS_SUSPEND 2
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#define DRM_MODE_DPMS_OFF 3
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/* Scaling mode options */
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#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
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software can still scale) */
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#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
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#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
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#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
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/* Dithering mode options */
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#define DRM_MODE_DITHERING_OFF 0
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#define DRM_MODE_DITHERING_ON 1
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#define DRM_MODE_DITHERING_AUTO 2
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/* Dirty info options */
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#define DRM_MODE_DIRTY_OFF 0
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#define DRM_MODE_DIRTY_ON 1
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#define DRM_MODE_DIRTY_ANNOTATE 2
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struct drm_mode_modeinfo {
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__u32 clock;
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__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
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__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
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__u32 vrefresh;
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__u32 flags;
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__u32 type;
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char name[DRM_DISPLAY_MODE_LEN];
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};
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struct drm_mode_card_res {
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__u64 fb_id_ptr;
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__u64 crtc_id_ptr;
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__u64 connector_id_ptr;
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__u64 encoder_id_ptr;
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__u32 count_fbs;
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__u32 count_crtcs;
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__u32 count_connectors;
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__u32 count_encoders;
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__u32 min_width, max_width;
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__u32 min_height, max_height;
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};
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struct drm_mode_crtc {
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__u64 set_connectors_ptr;
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__u32 count_connectors;
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__u32 crtc_id; /**< Id */
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__u32 fb_id; /**< Id of framebuffer */
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__u32 x, y; /**< Position on the frameuffer */
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__u32 gamma_size;
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__u32 mode_valid;
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struct drm_mode_modeinfo mode;
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};
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#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
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#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
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/* Planes blend with or override other bits on the CRTC */
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struct drm_mode_set_plane {
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__u32 plane_id;
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__u32 crtc_id;
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__u32 fb_id; /* fb object contains surface format type */
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__u32 flags; /* see above flags */
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/* Signed dest location allows it to be partially off screen */
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__s32 crtc_x, crtc_y;
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__u32 crtc_w, crtc_h;
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/* Source values are 16.16 fixed point */
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__u32 src_x, src_y;
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__u32 src_h, src_w;
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};
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struct drm_mode_get_plane {
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__u32 plane_id;
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__u32 crtc_id;
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__u32 fb_id;
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__u32 possible_crtcs;
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__u32 gamma_size;
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__u32 count_format_types;
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__u64 format_type_ptr;
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};
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struct drm_mode_get_plane_res {
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__u64 plane_id_ptr;
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__u32 count_planes;
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};
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#define DRM_MODE_ENCODER_NONE 0
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#define DRM_MODE_ENCODER_DAC 1
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#define DRM_MODE_ENCODER_TMDS 2
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#define DRM_MODE_ENCODER_LVDS 3
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#define DRM_MODE_ENCODER_TVDAC 4
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#define DRM_MODE_ENCODER_VIRTUAL 5
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struct drm_mode_get_encoder {
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__u32 encoder_id;
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__u32 encoder_type;
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__u32 crtc_id; /**< Id of crtc */
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__u32 possible_crtcs;
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__u32 possible_clones;
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};
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/* This is for connectors with multiple signal types. */
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/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
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#define DRM_MODE_SUBCONNECTOR_Automatic 0
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#define DRM_MODE_SUBCONNECTOR_Unknown 0
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#define DRM_MODE_SUBCONNECTOR_DVID 3
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#define DRM_MODE_SUBCONNECTOR_DVIA 4
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#define DRM_MODE_SUBCONNECTOR_Composite 5
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#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
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#define DRM_MODE_SUBCONNECTOR_Component 8
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#define DRM_MODE_SUBCONNECTOR_SCART 9
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#define DRM_MODE_CONNECTOR_Unknown 0
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#define DRM_MODE_CONNECTOR_VGA 1
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#define DRM_MODE_CONNECTOR_DVII 2
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#define DRM_MODE_CONNECTOR_DVID 3
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#define DRM_MODE_CONNECTOR_DVIA 4
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#define DRM_MODE_CONNECTOR_Composite 5
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#define DRM_MODE_CONNECTOR_SVIDEO 6
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#define DRM_MODE_CONNECTOR_LVDS 7
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#define DRM_MODE_CONNECTOR_Component 8
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#define DRM_MODE_CONNECTOR_9PinDIN 9
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#define DRM_MODE_CONNECTOR_DisplayPort 10
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#define DRM_MODE_CONNECTOR_HDMIA 11
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#define DRM_MODE_CONNECTOR_HDMIB 12
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#define DRM_MODE_CONNECTOR_TV 13
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#define DRM_MODE_CONNECTOR_eDP 14
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#define DRM_MODE_CONNECTOR_VIRTUAL 15
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struct drm_mode_get_connector {
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__u64 encoders_ptr;
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__u64 modes_ptr;
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__u64 props_ptr;
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__u64 prop_values_ptr;
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__u32 count_modes;
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__u32 count_props;
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__u32 count_encoders;
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__u32 encoder_id; /**< Current Encoder */
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__u32 connector_id; /**< Id */
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__u32 connector_type;
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__u32 connector_type_id;
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__u32 connection;
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__u32 mm_width, mm_height; /**< HxW in millimeters */
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__u32 subpixel;
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};
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#define DRM_MODE_PROP_PENDING (1<<0)
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#define DRM_MODE_PROP_RANGE (1<<1)
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#define DRM_MODE_PROP_IMMUTABLE (1<<2)
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#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
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#define DRM_MODE_PROP_BLOB (1<<4)
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#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
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struct drm_mode_property_enum {
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__u64 value;
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char name[DRM_PROP_NAME_LEN];
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};
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struct drm_mode_get_property {
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__u64 values_ptr; /* values and blob lengths */
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__u64 enum_blob_ptr; /* enum and blob id ptrs */
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__u32 prop_id;
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__u32 flags;
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char name[DRM_PROP_NAME_LEN];
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__u32 count_values;
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__u32 count_enum_blobs;
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};
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struct drm_mode_connector_set_property {
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__u64 value;
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__u32 prop_id;
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__u32 connector_id;
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};
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struct drm_mode_obj_get_properties {
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__u64 props_ptr;
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__u64 prop_values_ptr;
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__u32 count_props;
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__u32 obj_id;
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__u32 obj_type;
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};
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struct drm_mode_obj_set_property {
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__u64 value;
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__u32 prop_id;
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__u32 obj_id;
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__u32 obj_type;
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};
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struct drm_mode_get_blob {
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__u32 blob_id;
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__u32 length;
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__u64 data;
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};
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struct drm_mode_fb_cmd {
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__u32 fb_id;
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__u32 width, height;
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__u32 pitch;
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__u32 bpp;
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__u32 depth;
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/* driver specific handle */
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__u32 handle;
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};
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#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
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struct drm_mode_fb_cmd2 {
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__u32 fb_id;
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__u32 width, height;
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__u32 pixel_format; /* fourcc code from drm_fourcc.h */
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__u32 flags; /* see above flags */
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/*
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* In case of planar formats, this ioctl allows up to 4
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* buffer objects with offets and pitches per plane.
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* The pitch and offset order is dictated by the fourcc,
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* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
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*
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* YUV 4:2:0 image with a plane of 8 bit Y samples
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* followed by an interleaved U/V plane containing
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* 8 bit 2x2 subsampled colour difference samples.
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*
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* So it would consist of Y as offset[0] and UV as
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* offeset[1]. Note that offset[0] will generally
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* be 0.
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*/
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__u32 handles[4];
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__u32 pitches[4]; /* pitch for each plane */
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__u32 offsets[4]; /* offset of each plane */
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};
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#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
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#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
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#define DRM_MODE_FB_DIRTY_FLAGS 0x03
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#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
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/*
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* Mark a region of a framebuffer as dirty.
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*
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* Some hardware does not automatically update display contents
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* as a hardware or software draw to a framebuffer. This ioctl
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* allows userspace to tell the kernel and the hardware what
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* regions of the framebuffer have changed.
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*
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* The kernel or hardware is free to update more then just the
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* region specified by the clip rects. The kernel or hardware
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* may also delay and/or coalesce several calls to dirty into a
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* single update.
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*
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* Userspace may annotate the updates, the annotates are a
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* promise made by the caller that the change is either a copy
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* of pixels or a fill of a single color in the region specified.
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*
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* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
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* the number of updated regions are half of num_clips given,
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* where the clip rects are paired in src and dst. The width and
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* height of each one of the pairs must match.
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*
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* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
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* promises that the region specified of the clip rects is filled
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* completely with a single color as given in the color argument.
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*/
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struct drm_mode_fb_dirty_cmd {
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__u32 fb_id;
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__u32 flags;
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__u32 color;
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__u32 num_clips;
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__u64 clips_ptr;
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};
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struct drm_mode_mode_cmd {
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__u32 connector_id;
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struct drm_mode_modeinfo mode;
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};
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#define DRM_MODE_CURSOR_BO 0x01
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#define DRM_MODE_CURSOR_MOVE 0x02
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#define DRM_MODE_CURSOR_FLAGS 0x03
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/*
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* depending on the value in flags different members are used.
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*
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* CURSOR_BO uses
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* crtc
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* width
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* height
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* handle - if 0 turns the cursor of
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*
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* CURSOR_MOVE uses
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* crtc
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* x
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* y
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*/
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struct drm_mode_cursor {
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__u32 flags;
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__u32 crtc_id;
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__s32 x;
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__s32 y;
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__u32 width;
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__u32 height;
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/* driver specific handle */
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__u32 handle;
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};
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struct drm_mode_crtc_lut {
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__u32 crtc_id;
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__u32 gamma_size;
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/* pointers to arrays */
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__u64 red;
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__u64 green;
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__u64 blue;
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};
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#define DRM_MODE_PAGE_FLIP_EVENT 0x01
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#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
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/*
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* Request a page flip on the specified crtc.
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*
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* This ioctl will ask KMS to schedule a page flip for the specified
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* crtc. Once any pending rendering targeting the specified fb (as of
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* ioctl time) has completed, the crtc will be reprogrammed to display
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* that fb after the next vertical refresh. The ioctl returns
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* immediately, but subsequent rendering to the current fb will block
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* in the execbuffer ioctl until the page flip happens. If a page
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* flip is already pending as the ioctl is called, EBUSY will be
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* returned.
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*
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* The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
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* request that drm sends back a vblank event (see drm.h: struct
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* drm_event_vblank) when the page flip is done. The user_data field
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* passed in with this ioctl will be returned as the user_data field
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* in the vblank event struct.
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*
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* The reserved field must be zero until we figure out something
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* clever to use it for.
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*/
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struct drm_mode_crtc_page_flip {
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__u32 crtc_id;
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__u32 fb_id;
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__u32 flags;
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__u32 reserved;
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__u64 user_data;
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};
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/* create a dumb scanout buffer */
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struct drm_mode_create_dumb {
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uint32_t height;
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uint32_t width;
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uint32_t bpp;
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uint32_t flags;
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/* handle, pitch, size will be returned */
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uint32_t handle;
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uint32_t pitch;
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uint64_t size;
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};
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/* set up for mmap of a dumb scanout buffer */
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struct drm_mode_map_dumb {
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/** Handle for the object being mapped. */
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__u32 handle;
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__u32 pad;
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/**
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* Fake offset to use for subsequent mmap call
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*
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* This is a fixed-size type for 32/64 compatibility.
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*/
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__u64 offset;
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};
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struct drm_mode_destroy_dumb {
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uint32_t handle;
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};
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#endif
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