af3dc4a7ca
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
473 lines
13 KiB
C
473 lines
13 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2011
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <sys/module.h>
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#include <sys/proc.h>
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#include <sys/condvar.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/ehci.h>
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#include <dev/usb/controller/ehcireg.h>
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#include <machine/bus.h>
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#include <arm/ti/ti_prcm.h>
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#include <arm/ti/usb/omap_usb.h>
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#include <arm/ti/omap4/pandaboard/pandaboard.h>
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/* EHCI */
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#define OMAP_USBHOST_HCCAPBASE 0x0000
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#define OMAP_USBHOST_HCSPARAMS 0x0004
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#define OMAP_USBHOST_HCCPARAMS 0x0008
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#define OMAP_USBHOST_USBCMD 0x0010
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#define OMAP_USBHOST_USBSTS 0x0014
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#define OMAP_USBHOST_USBINTR 0x0018
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#define OMAP_USBHOST_FRINDEX 0x001C
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#define OMAP_USBHOST_CTRLDSSEGMENT 0x0020
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#define OMAP_USBHOST_PERIODICLISTBASE 0x0024
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#define OMAP_USBHOST_ASYNCLISTADDR 0x0028
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#define OMAP_USBHOST_CONFIGFLAG 0x0050
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#define OMAP_USBHOST_PORTSC(i) (0x0054 + (0x04 * (i)))
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#define OMAP_USBHOST_INSNREG00 0x0090
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#define OMAP_USBHOST_INSNREG01 0x0094
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#define OMAP_USBHOST_INSNREG02 0x0098
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#define OMAP_USBHOST_INSNREG03 0x009C
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#define OMAP_USBHOST_INSNREG04 0x00A0
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#define OMAP_USBHOST_INSNREG05_UTMI 0x00A4
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#define OMAP_USBHOST_INSNREG05_ULPI 0x00A4
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#define OMAP_USBHOST_INSNREG06 0x00A8
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#define OMAP_USBHOST_INSNREG07 0x00AC
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#define OMAP_USBHOST_INSNREG08 0x00B0
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#define OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
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#define OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT 31
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#define OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT 24
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#define OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT 22
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#define OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT 16
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#define OMAP_USBHOST_INSNREG05_ULPI_EXTREGADD_SHIFT 8
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#define OMAP_USBHOST_INSNREG05_ULPI_WRDATA_SHIFT 0
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#define ULPI_FUNC_CTRL_RESET (1 << 5)
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/*-------------------------------------------------------------------------*/
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/*
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* Macros for Set and Clear
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* See ULPI 1.1 specification to find the registers with Set and Clear offsets
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*/
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#define ULPI_SET(a) (a + 1)
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#define ULPI_CLR(a) (a + 2)
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/*-------------------------------------------------------------------------*/
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/*
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* Register Map
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*/
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#define ULPI_VENDOR_ID_LOW 0x00
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#define ULPI_VENDOR_ID_HIGH 0x01
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#define ULPI_PRODUCT_ID_LOW 0x02
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#define ULPI_PRODUCT_ID_HIGH 0x03
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#define ULPI_FUNC_CTRL 0x04
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#define ULPI_IFC_CTRL 0x07
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#define ULPI_OTG_CTRL 0x0a
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#define ULPI_USB_INT_EN_RISE 0x0d
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#define ULPI_USB_INT_EN_FALL 0x10
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#define ULPI_USB_INT_STS 0x13
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#define ULPI_USB_INT_LATCH 0x14
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#define ULPI_DEBUG 0x15
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#define ULPI_SCRATCH 0x16
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#define OMAP_EHCI_HC_DEVSTR "TI OMAP USB 2.0 controller"
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struct omap_ehci_softc {
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ehci_softc_t base; /* storage for EHCI code */
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device_t sc_dev;
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};
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static device_attach_t omap_ehci_attach;
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static device_detach_t omap_ehci_detach;
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/**
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* omap_ehci_read_4 - read a 32-bit value from the EHCI registers
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* omap_ehci_write_4 - write a 32-bit value from the EHCI registers
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* @sc: omap ehci device context
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* @off: byte offset within the register set to read from
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* @val: the value to write into the register
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*
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*
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* LOCKING:
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* None
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*
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* RETURNS:
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* nothing in case of write function, if read function returns the value read.
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*/
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static inline uint32_t
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omap_ehci_read_4(struct omap_ehci_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->base.sc_io_res, off));
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}
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static inline void
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omap_ehci_write_4(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->base.sc_io_res, off, val);
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}
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/**
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* omap_ehci_soft_phy_reset - resets the phy using the reset command
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* @isc: omap ehci device context
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* @port: port to send the reset over
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*
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*
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* LOCKING:
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* none
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*
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* RETURNS:
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* nothing
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*/
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static void
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omap_ehci_soft_phy_reset(struct omap_ehci_softc *isc, unsigned int port)
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{
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unsigned long timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
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uint32_t reg;
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reg = ULPI_FUNC_CTRL_RESET
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/* FUNCTION_CTRL_SET register */
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| (ULPI_SET(ULPI_FUNC_CTRL) << OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT)
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/* Write */
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| (2 << OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT)
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/* PORTn */
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| ((port + 1) << OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT)
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/* start ULPI access*/
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| (1 << OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT);
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omap_ehci_write_4(isc, OMAP_USBHOST_INSNREG05_ULPI, reg);
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/* Wait for ULPI access completion */
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while ((omap_ehci_read_4(isc, OMAP_USBHOST_INSNREG05_ULPI)
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& (1 << OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT))) {
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/* Sleep for a tick */
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pause("USBPHY_RESET", 1);
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if (timeout-- == 0) {
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device_printf(isc->sc_dev, "PHY reset operation timed out\n");
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break;
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}
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}
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}
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/**
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* omap_ehci_init - initialises the USB host EHCI controller
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* @isc: omap ehci device context
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*
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* This initialisation routine is quite heavily based on the work done by the
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* OMAP Linux team (for which I thank them very much). The init sequence is
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* almost identical, diverging only for the FreeBSD specifics.
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*
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* LOCKING:
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* none
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*
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* RETURNS:
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* 0 on success, a negative error code on failure.
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*/
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static int
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omap_ehci_init(struct omap_ehci_softc *isc)
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{
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uint32_t reg = 0;
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int i;
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device_t uhh_dev;
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uhh_dev = device_get_parent(isc->sc_dev);
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device_printf(isc->sc_dev, "Starting TI EHCI USB Controller\n");
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/* Set the interrupt threshold control, it controls the maximum rate at
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* which the host controller issues interrupts. We set it to 1 microframe
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* at startup - the default is 8 mircoframes (equates to 1ms).
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*/
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reg = omap_ehci_read_4(isc, OMAP_USBHOST_USBCMD);
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reg &= 0xff00ffff;
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reg |= (1 << 16);
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omap_ehci_write_4(isc, OMAP_USBHOST_USBCMD, reg);
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/* Soft reset the PHY using PHY reset command over ULPI */
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for (i = 0; i < OMAP_HS_USB_PORTS; i++) {
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if (omap_usb_port_mode(uhh_dev, i) == EHCI_HCD_OMAP_MODE_PHY)
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omap_ehci_soft_phy_reset(isc, i);
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}
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return(0);
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}
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/**
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* omap_ehci_probe - starts the given command
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* @dev:
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*
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* Effectively boilerplate EHCI resume code.
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*
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* LOCKING:
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* Caller should be holding the OMAP3_MMC lock.
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*
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* RETURNS:
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* EH_HANDLED or EH_NOT_HANDLED
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*/
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static int
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omap_ehci_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ti,ehci-omap"))
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return (ENXIO);
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device_set_desc(dev, OMAP_EHCI_HC_DEVSTR);
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return (BUS_PROBE_DEFAULT);
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}
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/**
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* omap_ehci_attach - driver entry point, sets up the ECHI controller/driver
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* @dev: the new device handle
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*
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* Sets up bus spaces, interrupt handles, etc for the EHCI controller. It also
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* parses the resource hints and calls omap_ehci_init() to initialise the
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* H/W.
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*
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* LOCKING:
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* none
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*
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* RETURNS:
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* 0 on success or a positive error code on failure.
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*/
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static int
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omap_ehci_attach(device_t dev)
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{
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struct omap_ehci_softc *isc = device_get_softc(dev);
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ehci_softc_t *sc = &isc->base;
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#ifdef SOC_OMAP4
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phandle_t root;
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#endif
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int err;
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int rid;
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#ifdef SOC_OMAP4
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/*
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* If we're running a Pandaboard, run Pandaboard-specific
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* init code.
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*/
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root = OF_finddevice("/");
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if (ofw_bus_node_is_compatible(root, "ti,omap4-panda"))
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pandaboard_usb_hub_init();
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#endif
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/* initialise some bus fields */
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sc->sc_bus.parent = dev;
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sc->sc_bus.devices = sc->sc_devices;
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sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
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sc->sc_bus.dma_bits = 32;
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sprintf(sc->sc_vendor, "Texas Instruments");
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/* save the device */
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isc->sc_dev = dev;
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/* get all DMA memory */
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if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
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&ehci_iterate_hw_softc)) {
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return (ENOMEM);
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}
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/* Allocate resource for the EHCI register set */
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rid = 0;
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sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->sc_io_res) {
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device_printf(dev, "Error: Could not map EHCI memory\n");
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goto error;
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}
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/* Request an interrupt resource */
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (sc->sc_irq_res == NULL) {
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device_printf(dev, "Error: could not allocate irq\n");
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goto error;
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}
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/* Add this device as a child of the USBus device */
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sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
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if (!sc->sc_bus.bdev) {
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device_printf(dev, "Error: could not add USB device\n");
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goto error;
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}
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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device_set_desc(sc->sc_bus.bdev, OMAP_EHCI_HC_DEVSTR);
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/* Initialise the ECHI registers */
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err = omap_ehci_init(isc);
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if (err) {
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device_printf(dev, "Error: could not setup OMAP EHCI, %d\n", err);
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goto error;
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}
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/* Set the tag and size of the register set in the EHCI context */
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sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
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sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
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sc->sc_io_size = rman_get_size(sc->sc_io_res);
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/* Setup the interrupt */
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err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
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if (err) {
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device_printf(dev, "Error: could not setup irq, %d\n", err);
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sc->sc_intr_hdl = NULL;
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goto error;
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}
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/* Finally we are ready to kick off the ECHI host controller */
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err = ehci_init(sc);
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if (err == 0) {
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err = device_probe_and_attach(sc->sc_bus.bdev);
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}
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if (err) {
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device_printf(dev, "Error: USB init failed err=%d\n", err);
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goto error;
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}
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return (0);
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error:
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omap_ehci_detach(dev);
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return (ENXIO);
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}
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/**
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* omap_ehci_detach - detach the device and cleanup the driver
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* @dev: device handle
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*
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* Clean-up routine where everything initialised in omap_ehci_attach is
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* freed and cleaned up. This function calls omap_ehci_fini() to shutdown
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* the on-chip module.
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*
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* LOCKING:
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* none
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*
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* RETURNS:
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* Always returns 0 (success).
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*/
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static int
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omap_ehci_detach(device_t dev)
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{
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struct omap_ehci_softc *isc = device_get_softc(dev);
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ehci_softc_t *sc = &isc->base;
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int err;
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/* during module unload there are lots of children leftover */
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device_delete_children(dev);
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/*
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* disable interrupts that might have been switched on in ehci_init
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*/
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if (sc->sc_io_res) {
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EWRITE4(sc, EHCI_USBINTR, 0);
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}
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if (sc->sc_irq_res && sc->sc_intr_hdl) {
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/*
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* only call ehci_detach() after ehci_init()
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*/
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ehci_detach(sc);
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err = bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl);
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if (err)
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device_printf(dev, "Error: could not tear down irq, %d\n", err);
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sc->sc_intr_hdl = NULL;
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}
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/* Free the resources stored in the base EHCI handler */
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if (sc->sc_irq_res) {
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
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sc->sc_irq_res = NULL;
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}
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if (sc->sc_io_res) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res);
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sc->sc_io_res = NULL;
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}
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return (0);
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}
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static device_method_t ehci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, omap_ehci_probe),
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DEVMETHOD(device_attach, omap_ehci_attach),
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DEVMETHOD(device_detach, omap_ehci_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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{0, 0}
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};
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static driver_t ehci_driver = {
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"ehci",
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ehci_methods,
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sizeof(struct omap_ehci_softc),
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};
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static devclass_t ehci_devclass;
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DRIVER_MODULE(ehci, omap_uhh, ehci_driver, ehci_devclass, 0, 0);
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