This adds bhnd(4) bus-level support for querying backplane interrupt vector routing, and delegating machine/bridge-specific interrupt handling to the concrete bhnd(4) driver implementation. On bhndb(4) bridged PCI devices, we provide the PCI/MSI interrupt directly to attached cores. On MIPS devices, we report a backplane interrupt count of 0, effectively disabling the bus-level interrupt assignment. This allows mips/broadcom to temporarily continue using hard-coded MIPS IRQs until bhnd_mips PIC support is implemented. Reviewed by: mizhka Approved by: adrian (mentor, implicit)
298 lines
7.8 KiB
C
298 lines
7.8 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <dev/bhnd/bhnd_ids.h>
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#include <dev/bhnd/bhndb/bhndbvar.h>
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#include <dev/bhnd/bhndb/bhndb_hwdata.h>
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#include "sibareg.h"
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#include "sibavar.h"
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/*
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* Supports attachment of siba(4) bus devices via a bhndb bridge.
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*/
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//
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// TODO: PCI rev < 6 interrupt handling
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//
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// On early PCI cores (rev < 6) interrupt masking is handled via interconnect
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// configuration registers (SBINTVEC), rather than the PCI_INT_MASK
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// config register.
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//
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// On those devices, we should handle interrupts locally using SBINTVEC, rather
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// than delegating to our parent bhndb device.
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//
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static int siba_bhndb_wars_hwup(struct siba_softc *sc);
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/* Bridge-specific core device quirks */
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enum {
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/** When PCIe-bridged, the D11 core's initiator request
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* timeout must be disabled to prevent D11 from entering a
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* RESP_TIMEOUT error state. */
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SIBA_QUIRK_PCIE_D11_SB_TIMEOUT = (1<<0)
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};
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static struct bhnd_device_quirk bridge_quirks[] = {
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BHND_CHIP_QUIRK(4311, HWREV_EQ(2), SIBA_QUIRK_PCIE_D11_SB_TIMEOUT),
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BHND_CHIP_QUIRK(4312, HWREV_EQ(0), SIBA_QUIRK_PCIE_D11_SB_TIMEOUT),
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BHND_DEVICE_QUIRK_END
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};
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static struct bhnd_device bridge_devs[] = {
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BHND_DEVICE(BCM, PCI, NULL, bridge_quirks),
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BHND_DEVICE_END
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};
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static int
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siba_bhndb_probe(device_t dev)
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{
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const struct bhnd_chipid *cid;
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int error;
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/* Defer to default probe implementation */
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if ((error = siba_probe(dev)) > 0)
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return (error);
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/* Check bus type */
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cid = BHNDB_GET_CHIPID(device_get_parent(dev), dev);
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if (cid->chip_type != BHND_CHIPTYPE_SIBA)
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return (ENXIO);
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/* Set device description */
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bhnd_set_default_bus_desc(dev, cid);
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return (error);
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}
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static int
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siba_bhndb_attach(device_t dev)
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{
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struct siba_softc *sc;
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int error;
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sc = device_get_softc(dev);
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/* Perform initial attach and enumerate our children. */
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if ((error = siba_attach(dev)))
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goto failed;
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/* Apply attach/resume workarounds before any child drivers attach */
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if ((error = siba_bhndb_wars_hwup(sc)))
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goto failed;
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/* Delegate remainder to standard bhnd method implementation */
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if ((error = bhnd_generic_attach(dev)))
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goto failed;
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return (0);
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failed:
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device_delete_children(dev);
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return (error);
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}
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static int
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siba_bhndb_resume(device_t dev)
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{
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struct siba_softc *sc;
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int error;
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sc = device_get_softc(dev);
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/* Apply attach/resume work-arounds */
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if ((error = siba_bhndb_wars_hwup(sc)))
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return (error);
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/* Call our superclass' implementation */
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return (siba_resume(dev));
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}
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/* Suspend all references to the device's cfg register blocks */
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static void
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siba_bhndb_suspend_cfgblocks(device_t dev, struct siba_devinfo *dinfo) {
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for (u_int i = 0; i < dinfo->core_id.num_cfg_blocks; i++) {
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if (dinfo->cfg[i] == NULL)
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continue;
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BHNDB_SUSPEND_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_MEMORY, dinfo->cfg[i]->res);
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}
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}
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static int
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siba_bhndb_suspend_child(device_t dev, device_t child)
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{
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struct siba_devinfo *dinfo;
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int error;
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if (device_get_parent(child) != dev)
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BUS_SUSPEND_CHILD(device_get_parent(dev), child);
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dinfo = device_get_ivars(child);
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/* Suspend the child */
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if ((error = bhnd_generic_br_suspend_child(dev, child)))
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return (error);
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/* Suspend resource references to the child's config registers */
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siba_bhndb_suspend_cfgblocks(dev, dinfo);
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return (0);
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}
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static int
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siba_bhndb_resume_child(device_t dev, device_t child)
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{
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struct siba_devinfo *dinfo;
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int error;
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if (device_get_parent(child) != dev)
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BUS_SUSPEND_CHILD(device_get_parent(dev), child);
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if (!device_is_suspended(child))
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return (EBUSY);
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dinfo = device_get_ivars(child);
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/* Resume all resource references to the child's config registers */
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for (u_int i = 0; i < dinfo->core_id.num_cfg_blocks; i++) {
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if (dinfo->cfg[i] == NULL)
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continue;
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error = BHNDB_RESUME_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_MEMORY, dinfo->cfg[i]->res);
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if (error) {
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siba_bhndb_suspend_cfgblocks(dev, dinfo);
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return (error);
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}
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}
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/* Resume the child */
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if ((error = bhnd_generic_br_resume_child(dev, child))) {
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siba_bhndb_suspend_cfgblocks(dev, dinfo);
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return (error);
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}
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return (0);
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}
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/* Work-around implementation for SIBA_QUIRK_PCIE_D11_SB_TIMEOUT */
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static int
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siba_bhndb_wars_pcie_clear_d11_timeout(struct siba_softc *sc)
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{
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struct siba_devinfo *dinfo;
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device_t hostb_dev;
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device_t d11;
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uint32_t imcfg;
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/* Only applies when bridged by PCIe */
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if ((hostb_dev = bhnd_find_hostb_device(sc->dev)) == NULL)
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return (ENXIO);
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if (bhnd_get_class(hostb_dev) != BHND_DEVCLASS_PCIE)
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return (0);
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/* Only applies if there's a D11 core */
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d11 = bhnd_match_child(sc->dev, &(struct bhnd_core_match) {
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BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_D11),
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BHND_MATCH_CORE_UNIT(0)
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});
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if (d11 == NULL)
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return (0);
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/* Clear initiator timeout in D11's CFG0 block */
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dinfo = device_get_ivars(d11);
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KASSERT(dinfo->cfg[0] != NULL, ("missing core config mapping"));
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imcfg = bhnd_bus_read_4(dinfo->cfg[0], SIBA_CFG0_IMCONFIGLOW);
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imcfg &= ~SIBA_IMCL_RTO_MASK;
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bhnd_bus_write_4(dinfo->cfg[0], SIBA_CFG0_IMCONFIGLOW, imcfg);
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return (0);
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}
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/**
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* Apply any hardware workarounds that are required upon attach or resume
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* of the bus.
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*/
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static int
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siba_bhndb_wars_hwup(struct siba_softc *sc)
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{
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device_t hostb_dev;
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uint32_t quirks;
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int error;
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if ((hostb_dev = bhnd_find_hostb_device(sc->dev)) == NULL)
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return (ENXIO);
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quirks = bhnd_device_quirks(hostb_dev, bridge_devs,
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sizeof(bridge_devs[0]));
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if (quirks & SIBA_QUIRK_PCIE_D11_SB_TIMEOUT) {
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if ((error = siba_bhndb_wars_pcie_clear_d11_timeout(sc)))
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return (error);
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}
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return (0);
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}
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static device_method_t siba_bhndb_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, siba_bhndb_probe),
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DEVMETHOD(device_attach, siba_bhndb_attach),
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DEVMETHOD(device_resume, siba_bhndb_resume),
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/* Bus interface */
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DEVMETHOD(bus_suspend_child, siba_bhndb_suspend_child),
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DEVMETHOD(bus_resume_child, siba_bhndb_resume_child),
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DEVMETHOD_END
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};
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DEFINE_CLASS_2(bhnd, siba_bhndb_driver, siba_bhndb_methods,
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sizeof(struct siba_softc), bhnd_bhndb_driver, siba_driver);
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DRIVER_MODULE(siba_bhndb, bhndb, siba_bhndb_driver, bhnd_devclass, NULL, NULL);
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MODULE_VERSION(siba_bhndb, 1);
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MODULE_DEPEND(siba_bhndb, siba, 1, 1, 1);
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MODULE_DEPEND(siba_bhndb, bhnd, 1, 1, 1);
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MODULE_DEPEND(siba_bhndb, bhndb, 1, 1, 1);
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