a0e860ef19
I/O8+ and I/O4+ intelligent serial controllers. si is for completely different hardware, also made by Specialix.
261 lines
7.3 KiB
C
261 lines
7.3 KiB
C
/*
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* Device driver for Specialix I/O8+ multiport serial card.
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*
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* Copyright 2003 Frank Mayhar <frank@exit.com>
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*
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* Derived from the "si" driver by Peter Wemm <peter@netplex.com.au>, using
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* lots of information from the Linux "specialix" driver by Roger Wolff
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* <R.E.Wolff@BitWizard.nl> and from the Intel CD1865 "Intelligent Eight-
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* Channel Communications Controller" datasheet. Roger was also nice
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* enough to answer numerous questions about stuff specific to the I/O8+
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* not covered by the CD1865 datasheet.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notices, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notices, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE.
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*
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* $FreeBSD$
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*/
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#include "opt_debug_sx.h"
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/* Utility and support routines for the Specialix I/O8+ driver. */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/tty.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <machine/clock.h>
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#include <sys/rman.h>
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#include <dev/sx/cd1865.h>
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#include <dev/sx/sxvar.h>
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#include <dev/sx/sx.h>
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#include <dev/sx/sx_util.h>
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/*
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* sx_probe_io8()
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* Probe the board to verify that it is a Specialix I/O8+.
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*
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* Description:
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* This is called by sx_pci_attach() (and possibly in the future by
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* sx_isa_attach()) to verify that the card we're attaching to is
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* indeed a Specialix I/O8+. To do this, we check for the Prescaler
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* Period Register of the CD1865 chip and for the Specialix signature
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* on the DSR input line of each channel. These lines, along with the
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* RTS output lines, are wired down in hardware.
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*/
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int
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sx_probe_io8(
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device_t dev)
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{
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struct sx_softc *sc;
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unsigned char val1, val2;
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int i;
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sc = device_get_softc(dev);
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/*
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* Try to write the Prescaler Period Register, then read it back,
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* twice. If this fails, it's not an I/O8+.
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*/
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sx_cd1865_out(sc, CD1865_PPRL, 0x5a);
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DELAY(1);
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val1 = sx_cd1865_in(sc, CD1865_PPRL);
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sx_cd1865_out(sc, CD1865_PPRL, 0xa5);
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DELAY(1);
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val2 = sx_cd1865_in(sc, CD1865_PPRL);
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if ((val1 != 0x5a) || (val2 != 0xa5))
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return(1);
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/*
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* Check the lines that Specialix uses as board identification.
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* These are the DSR input and the RTS output, which are wired
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* down.
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*/
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val1 = 0;
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for (i = 0; i < 8; i++) {
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sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
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if (sx_cd1865_in(sc, CD1865_MSVR) & CD1865_MSVR_DSR) /* Set? */
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val1 |= 1 << i; /* OR it in. */
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}
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#ifdef notdef
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val2 = 0;
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for (i = 0; i < 8; i++) {
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sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
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if (sx_cd1865_in(sc, CD1865_MSVR) & CD1865_MSVR_RTS) /* Set? */
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val2 |= 1 << i; /* OR it in. */
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}
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/*
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* They managed to switch the bit order between the docs and
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* the IO8+ card. The new PCI card now conforms to old docs.
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* They changed the PCI docs to reflect the situation on the
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* old card.
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*/
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val2 = (bp->flags & SX_BOARD_IS_PCI) ? 0x4d : 0xb2;
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#endif /* notdef */
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if (val1 != 0x4d) {
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if (bootverbose)
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device_printf(dev,
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"Specialix I/O8+ ID 0x4d not found (0x%02x).\n",
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val1);
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return(1);
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}
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return(0); /* Probed successfully. */
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}
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/*
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* sx_init_CD1865()
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* Hard-reset and initialize the I/O8+ CD1865 processor.
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*
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* Description:
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* This routine does a hard reset of the CD1865 chip and waits for it
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* to complete. (The reset should complete after 500us; we wait 1ms
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* and fail if we time out.) We then initialize the CD1865 processor.
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*/
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int
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sx_init_cd1865(
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struct sx_softc *sc,
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int unit)
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{
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int s;
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unsigned int to;
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s = spltty();
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disable_intr();
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sx_cd1865_out(sc, CD1865_GSVR, 0x00); /* Clear the GSVR. */
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sx_cd1865_wait_CCR(sc, 0); /* Wait for the CCR to clear. */
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sx_cd1865_out(sc, CD1865_CCR, CD1865_CCR_HARDRESET); /* Reset CD1865. */
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enable_intr();
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to = SX_GSVR_TIMEOUT/5;
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while (to-- > 0) {
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if (sx_cd1865_in(sc, CD1865_GSVR) == 0xff)
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break;
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DELAY(5);
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}
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if (to == 0) {
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splx(s);
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printf("sx%d: Timeout waiting for reset.\n", unit);
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return(EIO);
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}
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/*
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* The high five bits of the Global Interrupt Vector Register is
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* used to identify daisy-chained CD1865 chips. The I/O8+ isn't
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* daisy chained, but we have to initialize the field anyway.
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*/
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sx_cd1865_out(sc, CD1865_GIVR, SX_CD1865_ID);
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/* Clear the Global Interrupting Channel register. */
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sx_cd1865_out(sc, CD1865_GICR, 0);
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/*
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* Set the Service Match Registers to the appropriate values. See
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* the cd1865.h include file for more information.
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*/
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sx_cd1865_out(sc, CD1865_MSMR, CD1865_ACK_MINT); /* Modem. */
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sx_cd1865_out(sc, CD1865_TSMR, CD1865_ACK_TINT); /* Transmit. */
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sx_cd1865_out(sc, CD1865_RSMR, CD1865_ACK_RINT); /* Receive. */
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/*
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* Set RegAckEn in the Service Request Configuration Register;
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* we'll be acknowledging service requests in software, not
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* hardware.
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*/
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sx_cd1865_bis(sc, CD1865_SRCR, CD1865_SRCR_REGACKEN);
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/*
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* Set the CD1865 timer tick rate. The value here is the processor
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* clock rate (in MHz) divided by the rate in ticks per second. See
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* commentary in sx.h.
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*/
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sx_cd1865_out(sc, CD1865_PPRH, SX_CD1865_PRESCALE >> 8);
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sx_cd1865_out(sc, CD1865_PPRL, SX_CD1865_PRESCALE & 0xff);
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splx(s);
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return(0);
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}
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#ifdef notyet
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/*
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* Set the IRQ using the RTS lines that run to the PAL on the board....
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*
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* This is a placeholder for ISA support, if that's ever implemented. This
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* should _only_ be called from sx_isa_attach().
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*/
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int
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sx_set_irq(
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struct sx_softc *sc,
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int unit,
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int irq)
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{
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register int virq;
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register int i, j;
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switch (irq) {
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/* In the same order as in the docs... */
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case 15:
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virq = 0;
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break;
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case 12:
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virq = 1;
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break;
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case 11:
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virq = 2;
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break;
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case 9:
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virq = 3;
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break;
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default:
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printf("sx%d: Illegal irq %d.\n", unit, irq);
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return(0);
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}
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for (i = 0; i < 2; i++) {
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sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
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j = ((virq >> i) & 0x1) ? MSVR_RTS : 0;
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sx_cd1865_out(sc, CD1865_MSVRTS, j);
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}
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return(1);
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}
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#endif /* notyet */
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/*
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* sx_int_port()
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* Determine the port that interrupted us.
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*
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* Description:
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* This routine checks the Global Interrupting Channel Register (GICR)
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* to find the port that caused an interrupt. It returns a pointer to
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* the sx_port structure of the interrupting port, or NULL if there was
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* none.
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*
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* XXX - check type/validity of interrupt?
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*/
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struct sx_port *
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sx_int_port(
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struct sx_softc *sc,
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int unit)
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{
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unsigned char chan;
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struct sx_port *pp;
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chan = (sx_cd1865_in(sc, CD1865_GSCR2|SX_EI) & CD1865_GICR_CHAN_MASK)
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>> CD1865_GICR_CHAN_SHIFT;
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DPRINT((NULL, DBG_INTR, "Intr chan %d\n", chan));
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if (chan < CD1865_NUMCHAN) {
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pp = sc->sc_ports + (int)chan;
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return(pp);
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}
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printf("sx%d: False interrupt on port %d.\n", unit, chan);
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return(NULL);
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}
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