dad3b6c6fd
frequency generation and what frequency the generated was anyones guess. In general the 32.768kHz RTC clock x-tal was the best, because that was a regular wrist-watch Xtal, whereas the X-tal generating the ISA bus frequency was much lower quality, often costing as much as several cents a piece, so it made good sense to check the ISA bus frequency against the RTC clock. The other relevant property of those machines, is that they typically had no more than 16MB RAM. These days, CPU chips croak if their clocks are not tightly within specs and all necessary frequencies are derived from the master crystal by means if PLL's. Considering that it takes on average 1.5 second to calibrate the frequency of the i8254 counter, that more likely than not, we will not actually use the result of the calibration, and as the final clincher, we seldom use the i8254 for anything besides BEL in syscons anyway, it has become time to drop the calibration code. If you need to tell the system what frequency your i8254 runs, you can do so from the loader using hw.i8254.freq or using the sysctl kern.timecounter.tc.i8254.frequency.
680 lines
16 KiB
C
680 lines
16 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz and Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Routines to handle clock hardware.
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*/
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/*
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* inittodr, settodr and support routines written
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* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
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*
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* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
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*/
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/*
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* modified for PC98 by Kakefuda
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*/
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#include "opt_apic.h"
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#include "opt_clock.h"
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#include "opt_isa.h"
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#include "opt_mca.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/lock.h>
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#include <sys/kdb.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <sys/power.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cputypes.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/psl.h>
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#ifdef DEV_APIC
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#include <machine/apicvar.h>
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#endif
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#include <machine/specialreg.h>
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#include <machine/ppireg.h>
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#include <machine/timerreg.h>
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#include <i386/isa/icu.h>
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#include <pc98/cbus/cbus.h>
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#include <pc98/pc98/pc98_machdep.h>
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#ifdef DEV_ISA
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#include <isa/isavar.h>
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#endif
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#define TIMER_DIV(x) ((i8254_freq + (x) / 2) / (x))
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int clkintr_pending;
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int statclock_disable;
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#ifndef TIMER_FREQ
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#define TIMER_FREQ 2457600
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#endif
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u_int i8254_freq = TIMER_FREQ;
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TUNABLE_INT("hw.i8254.freq", &i8254_freq);
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int i8254_max_count;
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static int i8254_real_max_count;
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static struct mtx clock_lock;
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static struct intsrc *i8254_intsrc;
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static u_int32_t i8254_lastcount;
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static u_int32_t i8254_offset;
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static int (*i8254_pending)(struct intsrc *);
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static int i8254_ticked;
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static int using_lapic_timer;
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/* Values for timerX_state: */
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#define RELEASED 0
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#define RELEASE_PENDING 1
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#define ACQUIRED 2
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#define ACQUIRE_PENDING 3
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static u_char timer1_state;
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static void rtc_serialcombit(int);
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static void rtc_serialcom(int);
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static int rtc_inb(void);
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static void rtc_outb(int);
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned i8254_simple_get_timecount(struct timecounter *tc);
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static void set_i8254_freq(u_int freq, int intr_freq);
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static struct timecounter i8254_timecounter = {
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i8254_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"i8254", /* name */
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0 /* quality */
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};
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static int
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clkintr(struct trapframe *frame)
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{
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if (timecounter->tc_get_timecount == i8254_get_timecount) {
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mtx_lock_spin(&clock_lock);
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if (i8254_ticked)
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i8254_ticked = 0;
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else {
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i8254_offset += i8254_max_count;
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i8254_lastcount = 0;
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}
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clkintr_pending = 0;
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mtx_unlock_spin(&clock_lock);
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}
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KASSERT(!using_lapic_timer, ("clk interrupt enabled with lapic timer"));
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hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
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return (FILTER_HANDLED);
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}
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int
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timer_spkr_acquire(void)
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{
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int mode;
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mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
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if (timer1_state != RELEASED)
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return (-1);
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timer1_state = ACQUIRED;
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/*
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* This access to the timer registers is as atomic as possible
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* because it is a single instruction. We could do better if we
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* knew the rate. Use of splclock() limits glitches to 10-100us,
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* and this is probably good enough for timer2, so we aren't as
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* careful with it as with timer0.
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*/
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outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
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ppi_spkr_on(); /* enable counter1 output to speaker */
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return (0);
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}
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int
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timer_spkr_release(void)
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{
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if (timer1_state != ACQUIRED)
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return (-1);
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timer1_state = RELEASED;
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outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
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ppi_spkr_off(); /* disable counter1 output to speaker */
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return (0);
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}
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void
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timer_spkr_setfreq(int freq)
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{
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freq = i8254_freq / freq;
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mtx_lock_spin(&clock_lock);
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outb(TIMER_CNTR1, (freq) & 0xff);
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outb(TIMER_CNTR1, (freq) >> 8);
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mtx_unlock_spin(&clock_lock);
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}
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static int
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getit(void)
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{
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int high, low;
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mtx_lock_spin(&clock_lock);
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/* Select timer0 and latch counter value. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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low = inb(TIMER_CNTR0);
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high = inb(TIMER_CNTR0);
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mtx_unlock_spin(&clock_lock);
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return ((high << 8) | low);
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}
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/*
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* Wait "n" microseconds.
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* Relies on timer 1 counting down from (i8254_freq / hz)
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* Note: timer had better have been programmed before this is first used!
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*/
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void
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DELAY(int n)
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{
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int delta, prev_tick, tick, ticks_left;
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#ifdef DELAYDEBUG
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int getit_calls = 1;
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int n1;
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static int state = 0;
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if (state == 0) {
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state = 1;
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for (n1 = 1; n1 <= 10000000; n1 *= 10)
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DELAY(n1);
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state = 2;
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}
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if (state == 1)
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printf("DELAY(%d)...", n);
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#endif
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/*
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* Read the counter first, so that the rest of the setup overhead is
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* counted. Guess the initial overhead is 20 usec (on most systems it
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* takes about 1.5 usec for each of the i/o's in getit(). The loop
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* takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
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* multiplications and divisions to scale the count take a while).
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*
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* However, if ddb is active then use a fake counter since reading
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* the i8254 counter involves acquiring a lock. ddb must not do
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* locking for many reasons, but it calls here for at least atkbd
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* input.
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*/
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#ifdef KDB
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if (kdb_active)
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prev_tick = 1;
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else
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#endif
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prev_tick = getit();
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n -= 0; /* XXX actually guess no initial overhead */
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/*
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* Calculate (n * (i8254_freq / 1e6)) without using floating point
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* and without any avoidable overflows.
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*/
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if (n <= 0)
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ticks_left = 0;
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else if (n < 256)
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/*
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* Use fixed point to avoid a slow division by 1000000.
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* 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
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* 2^15 is the first power of 2 that gives exact results
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* for n between 0 and 256.
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*/
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ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
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else
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/*
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* Don't bother using fixed point, although gcc-2.7.2
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* generates particularly poor code for the long long
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* division, since even the slow way will complete long
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* before the delay is up (unless we're interrupted).
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*/
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ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
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/ 1000000;
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while (ticks_left > 0) {
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#ifdef KDB
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if (kdb_active) {
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outb(0x5f, 0);
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tick = prev_tick - 1;
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if (tick <= 0)
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tick = i8254_max_count;
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} else
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#endif
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tick = getit();
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#ifdef DELAYDEBUG
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++getit_calls;
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#endif
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delta = prev_tick - tick;
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prev_tick = tick;
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if (delta < 0) {
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delta += i8254_max_count;
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/*
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* Guard against i8254_max_count being wrong.
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* This shouldn't happen in normal operation,
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* but it may happen if set_i8254_freq() is
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* traced.
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*/
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if (delta < 0)
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delta = 0;
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}
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ticks_left -= delta;
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}
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#ifdef DELAYDEBUG
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if (state == 1)
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printf(" %d calls to getit() at %d usec each\n",
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getit_calls, (n + 5) / getit_calls);
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#endif
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}
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static void
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set_i8254_freq(u_int freq, int intr_freq)
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{
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int new_i8254_real_max_count;
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i8254_timecounter.tc_frequency = freq;
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mtx_lock_spin(&clock_lock);
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i8254_freq = freq;
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if (using_lapic_timer)
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new_i8254_real_max_count = 0x10000;
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else
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new_i8254_real_max_count = TIMER_DIV(intr_freq);
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if (new_i8254_real_max_count != i8254_real_max_count) {
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i8254_real_max_count = new_i8254_real_max_count;
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if (i8254_real_max_count == 0x10000)
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i8254_max_count = 0xffff;
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else
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i8254_max_count = i8254_real_max_count;
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, i8254_real_max_count & 0xff);
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outb(TIMER_CNTR0, i8254_real_max_count >> 8);
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}
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mtx_unlock_spin(&clock_lock);
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}
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static void
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i8254_restore(void)
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{
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mtx_lock_spin(&clock_lock);
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, i8254_real_max_count & 0xff);
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outb(TIMER_CNTR0, i8254_real_max_count >> 8);
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* Restore all the timers non-atomically (XXX: should be atomically).
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*
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* This function is called from pmtimer_resume() to restore all the timers.
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* This should not be necessary, but there are broken laptops that do not
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* restore all the timers on resume.
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*/
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void
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timer_restore(void)
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{
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i8254_restore(); /* restore i8254_freq and hz */
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}
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/* This is separate from startrtclock() so that it can be called early. */
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void
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i8254_init(void)
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{
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mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
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if (pc98_machine_type & M_8M)
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i8254_freq = 1996800L; /* 1.9968 MHz */
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else
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i8254_freq = 2457600L; /* 2.4576 MHz */
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set_i8254_freq(i8254_freq, hz);
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}
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void
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startrtclock()
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{
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set_i8254_freq(i8254_freq, hz);
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tc_init(&i8254_timecounter);
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init_TSC();
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}
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static void
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rtc_serialcombit(int i)
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{
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outb(IO_RTC, ((i&0x01)<<5)|0x07);
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DELAY(1);
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outb(IO_RTC, ((i&0x01)<<5)|0x17);
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DELAY(1);
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outb(IO_RTC, ((i&0x01)<<5)|0x07);
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DELAY(1);
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}
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static void
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rtc_serialcom(int i)
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{
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rtc_serialcombit(i&0x01);
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rtc_serialcombit((i&0x02)>>1);
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rtc_serialcombit((i&0x04)>>2);
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rtc_serialcombit((i&0x08)>>3);
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outb(IO_RTC, 0x07);
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DELAY(1);
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outb(IO_RTC, 0x0f);
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DELAY(1);
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outb(IO_RTC, 0x07);
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DELAY(1);
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}
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static void
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rtc_outb(int val)
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{
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int s;
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int sa = 0;
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for (s=0;s<8;s++) {
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sa = ((val >> s) & 0x01) ? 0x27 : 0x07;
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outb(IO_RTC, sa); /* set DI & CLK 0 */
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DELAY(1);
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outb(IO_RTC, sa | 0x10); /* CLK 1 */
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DELAY(1);
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}
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outb(IO_RTC, sa & 0xef); /* CLK 0 */
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}
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static int
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rtc_inb(void)
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{
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int s;
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int sa = 0;
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for (s=0;s<8;s++) {
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sa |= ((inb(0x33) & 0x01) << s);
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outb(IO_RTC, 0x17); /* CLK 1 */
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DELAY(1);
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outb(IO_RTC, 0x07); /* CLK 0 */
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DELAY(2);
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}
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return sa;
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}
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/*
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* Initialize the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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void
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inittodr(time_t base)
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{
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struct timespec ts;
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struct clocktime ct;
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int i;
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if (base) {
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ts.tv_sec = base;
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ts.tv_nsec = 0;
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tc_setclock(&ts);
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}
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rtc_serialcom(0x03); /* Time Read */
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rtc_serialcom(0x01); /* Register shift command. */
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DELAY(20);
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ct.nsec = 0;
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ct.sec = bcd2bin(rtc_inb() & 0xff); /* sec */
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ct.min = bcd2bin(rtc_inb() & 0xff); /* min */
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ct.hour = bcd2bin(rtc_inb() & 0xff); /* hour */
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ct.day = bcd2bin(rtc_inb() & 0xff); /* date */
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i = rtc_inb();
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ct.dow = i & 0x0f; /* dow */
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ct.mon = (i >> 4) & 0x0f; /* month */
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ct.year = bcd2bin(rtc_inb() & 0xff) + 1900; /* year */
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if (ct.year < 1995)
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ct.year += 100;
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/* Set dow = -1 because some clocks don't set it correctly. */
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ct.dow = -1;
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if (clock_ct_to_ts(&ct, &ts)) {
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printf("Invalid time in clock: check and reset the date!\n");
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return;
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}
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ts.tv_sec += utc_offset();
|
|
tc_setclock(&ts);
|
|
}
|
|
|
|
/*
|
|
* Write system time back to RTC
|
|
*/
|
|
void
|
|
resettodr()
|
|
{
|
|
struct timespec ts;
|
|
struct clocktime ct;
|
|
|
|
if (disable_rtc_set)
|
|
return;
|
|
|
|
getnanotime(&ts);
|
|
ts.tv_sec -= utc_offset();
|
|
clock_ts_to_ct(&ts, &ct);
|
|
|
|
rtc_serialcom(0x01); /* Register shift command. */
|
|
|
|
rtc_outb(bin2bcd(ct.sec)); /* Write back Seconds */
|
|
rtc_outb(bin2bcd(ct.min)); /* Write back Minutes */
|
|
rtc_outb(bin2bcd(ct.hour)); /* Write back Hours */
|
|
|
|
rtc_outb(bin2bcd(ct.day)); /* Write back Day */
|
|
rtc_outb((ct.mon << 4) | ct.dow); /* Write back Month and DOW */
|
|
rtc_outb(bin2bcd(ct.year % 100)); /* Write back Year */
|
|
|
|
rtc_serialcom(0x02); /* Time set & Counter hold command. */
|
|
rtc_serialcom(0x00); /* Register hold command. */
|
|
}
|
|
|
|
|
|
/*
|
|
* Start both clocks running.
|
|
*/
|
|
void
|
|
cpu_initclocks()
|
|
{
|
|
|
|
#ifdef DEV_APIC
|
|
using_lapic_timer = lapic_setup_clock();
|
|
#endif
|
|
/*
|
|
* If we aren't using the local APIC timer to drive the kernel
|
|
* clocks, setup the interrupt handler for the 8254 timer 0 so
|
|
* that it can drive hardclock(). Otherwise, change the 8254
|
|
* timecounter to user a simpler algorithm.
|
|
*/
|
|
if (!using_lapic_timer) {
|
|
intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL,
|
|
NULL, INTR_TYPE_CLK, NULL);
|
|
i8254_intsrc = intr_lookup_source(0);
|
|
if (i8254_intsrc != NULL)
|
|
i8254_pending =
|
|
i8254_intsrc->is_pic->pic_source_pending;
|
|
} else {
|
|
i8254_timecounter.tc_get_timecount =
|
|
i8254_simple_get_timecount;
|
|
i8254_timecounter.tc_counter_mask = 0xffff;
|
|
set_i8254_freq(i8254_freq, hz);
|
|
}
|
|
|
|
init_TSC_tc();
|
|
}
|
|
|
|
void
|
|
cpu_startprofclock(void)
|
|
{
|
|
}
|
|
|
|
void
|
|
cpu_stopprofclock(void)
|
|
{
|
|
}
|
|
|
|
static int
|
|
sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
int error;
|
|
u_int freq;
|
|
|
|
/*
|
|
* Use `i8254' instead of `timer' in external names because `timer'
|
|
* is is too generic. Should use it everywhere.
|
|
*/
|
|
freq = i8254_freq;
|
|
error = sysctl_handle_int(oidp, &freq, 0, req);
|
|
if (error == 0 && req->newptr != NULL)
|
|
set_i8254_freq(freq, hz);
|
|
return (error);
|
|
}
|
|
|
|
SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
|
|
0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
|
|
|
|
static unsigned
|
|
i8254_simple_get_timecount(struct timecounter *tc)
|
|
{
|
|
|
|
return (i8254_max_count - getit());
|
|
}
|
|
|
|
static unsigned
|
|
i8254_get_timecount(struct timecounter *tc)
|
|
{
|
|
u_int count;
|
|
u_int high, low;
|
|
u_int eflags;
|
|
|
|
eflags = read_eflags();
|
|
mtx_lock_spin(&clock_lock);
|
|
|
|
/* Select timer0 and latch counter value. */
|
|
outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
|
|
|
|
low = inb(TIMER_CNTR0);
|
|
high = inb(TIMER_CNTR0);
|
|
count = i8254_max_count - ((high << 8) | low);
|
|
if (count < i8254_lastcount ||
|
|
(!i8254_ticked && (clkintr_pending ||
|
|
((count < 20 || (!(eflags & PSL_I) && count < i8254_max_count / 2u)) &&
|
|
i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
|
|
i8254_ticked = 1;
|
|
i8254_offset += i8254_max_count;
|
|
}
|
|
i8254_lastcount = count;
|
|
count += i8254_offset;
|
|
mtx_unlock_spin(&clock_lock);
|
|
return (count);
|
|
}
|
|
|
|
#ifdef DEV_ISA
|
|
/*
|
|
* Attach to the ISA PnP descriptors for the timer and realtime clock.
|
|
*/
|
|
static struct isa_pnp_id attimer_ids[] = {
|
|
{ 0x0001d041 /* PNP0100 */, "AT timer" },
|
|
{ 0x000bd041 /* PNP0B00 */, "AT realtime clock" },
|
|
{ 0 }
|
|
};
|
|
|
|
static int
|
|
attimer_probe(device_t dev)
|
|
{
|
|
int result;
|
|
|
|
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0)
|
|
device_quiet(dev);
|
|
return(result);
|
|
}
|
|
|
|
static int
|
|
attimer_attach(device_t dev)
|
|
{
|
|
return(0);
|
|
}
|
|
|
|
static device_method_t attimer_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, attimer_probe),
|
|
DEVMETHOD(device_attach, attimer_attach),
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend), /* XXX stop statclock? */
|
|
DEVMETHOD(device_resume, bus_generic_resume), /* XXX restart statclock? */
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t attimer_driver = {
|
|
"attimer",
|
|
attimer_methods,
|
|
1, /* no softc */
|
|
};
|
|
|
|
static devclass_t attimer_devclass;
|
|
|
|
DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
|
|
#endif /* DEV_ISA */
|