dim 17d956b962 Pull in r230348 from upstream llvm trunk (by Tim Northover): ... ARM: treat [N x i32] and [N x i64] as AAPCS composite types The logic is almost there already, with our special homogeneous aggregate handling. Tweaking it like this allows front-ends to emit AAPCS compliant code without ever having to count registers or add discarded padding arguments. Only arrays of i32 and i64 are needed to model AAPCS rules, but I decided to apply the logic to all integer arrays for more consistency. This fixes a possible "Unexpected member type for HA" error when compiling lib/msun/bsdsrc/b_tgamma.c for armv6. Reported by: Jakub Palider <jpa@semihalf.com>		2015-03-23 21:13:29 +00:00
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llvm	Pull in r230348 from upstream llvm trunk (by Tim Northover):	2015-03-23 21:13:29 +00:00
llvm-c	Merge llvm 3.6.0 final from ^/vendor/llvm/dist, merge clang 3.6.0 final	2015-02-25 18:50:24 +00:00