a7b90d80fc
PSR only to achieve setting PSR.i back to it's previous value. It makes it impossible to change any of the 30+ other unrelated bits when done between intr_disable() and intr_restore(). That's bad. Instead have intr_disable() return 1 when interrupts were previously enabled and 0 otherwise and only enable interrupts in intr_restore() when given a non-0 value. This change specifically disallows using intr_restore() to disable interrupts. The reason is simple: interrupts only need to be restored after they are being disabled, which means that intr_restore() is called with interrupts disabled and we only need to enable them if they were previously enabled. This change does not fix any bugs, other than that it bugged me... Approved by: re@ (blanket)
209 lines
4.2 KiB
C
209 lines
4.2 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CPUFUNC_H_
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#define _MACHINE_CPUFUNC_H_
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#ifdef _KERNEL
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#include <sys/types.h>
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#include <machine/ia64_cpu.h>
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#include <machine/vmparam.h>
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struct thread;
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#ifdef __GNUC__
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static __inline void
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breakpoint(void)
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{
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__asm __volatile("break 0x80100"); /* XXX use linux value */
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}
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#endif
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extern uint64_t ia64_port_base;
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#define __MEMIO_ADDR(x) (__volatile void*)(IA64_PHYS_TO_RR6(x))
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#define __PIO_ADDR(x) (__volatile void*)(ia64_port_base | \
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(((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
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/*
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* I/O port reads with ia32 semantics.
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*/
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static __inline uint8_t
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inb(unsigned int port)
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{
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__volatile uint8_t *p;
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uint8_t v;
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p = __PIO_ADDR(port);
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ia64_mf();
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v = *p;
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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static __inline uint16_t
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inw(unsigned int port)
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{
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__volatile uint16_t *p;
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uint16_t v;
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p = __PIO_ADDR(port);
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ia64_mf();
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v = *p;
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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static __inline uint32_t
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inl(unsigned int port)
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{
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volatile uint32_t *p;
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uint32_t v;
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p = __PIO_ADDR(port);
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ia64_mf();
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v = *p;
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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static __inline void
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insb(unsigned int port, void *addr, size_t count)
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{
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uint8_t *buf = addr;
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while (count--)
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*buf++ = inb(port);
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}
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static __inline void
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insw(unsigned int port, void *addr, size_t count)
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{
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uint16_t *buf = addr;
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while (count--)
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*buf++ = inw(port);
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}
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static __inline void
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insl(unsigned int port, void *addr, size_t count)
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{
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uint32_t *buf = addr;
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while (count--)
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*buf++ = inl(port);
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}
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static __inline void
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outb(unsigned int port, uint8_t data)
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{
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volatile uint8_t *p;
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p = __PIO_ADDR(port);
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ia64_mf();
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*p = data;
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ia64_mf_a();
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ia64_mf();
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}
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static __inline void
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outw(unsigned int port, uint16_t data)
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{
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volatile uint16_t *p;
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p = __PIO_ADDR(port);
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ia64_mf();
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*p = data;
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ia64_mf_a();
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ia64_mf();
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}
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static __inline void
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outl(unsigned int port, uint32_t data)
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{
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volatile uint32_t *p;
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p = __PIO_ADDR(port);
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ia64_mf();
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*p = data;
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ia64_mf_a();
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ia64_mf();
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}
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static __inline void
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outsb(unsigned int port, const void *addr, size_t count)
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{
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const uint8_t *buf = addr;
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while (count--)
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outb(port, *buf++);
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}
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static __inline void
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outsw(unsigned int port, const void *addr, size_t count)
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{
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const uint16_t *buf = addr;
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while (count--)
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outw(port, *buf++);
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}
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static __inline void
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outsl(unsigned int port, const void *addr, size_t count)
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{
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const uint32_t *buf = addr;
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while (count--)
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outl(port, *buf++);
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}
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static __inline void
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disable_intr(void)
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{
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__asm __volatile ("rsm psr.i");
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}
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static __inline void
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enable_intr(void)
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{
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__asm __volatile ("ssm psr.i;; srlz.d");
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}
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static __inline register_t
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intr_disable(void)
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{
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register_t psr;
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__asm __volatile ("mov %0=psr;;" : "=r"(psr));
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disable_intr();
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return ((psr & IA64_PSR_I) ? 1 : 0);
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}
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static __inline void
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intr_restore(register_t ie)
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{
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if (ie)
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enable_intr();
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}
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#endif /* _KERNEL */
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#endif /* !_MACHINE_CPUFUNC_H_ */
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