264 lines
7.0 KiB
C
264 lines
7.0 KiB
C
/*
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* Copyright (c) 2013-2016 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* File: ql_def.h
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#ifndef _QL_DEF_H_
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#define _QL_DEF_H_
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#define BIT_0 (0x1 << 0)
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#define BIT_1 (0x1 << 1)
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#define BIT_2 (0x1 << 2)
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#define BIT_3 (0x1 << 3)
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#define BIT_4 (0x1 << 4)
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#define BIT_5 (0x1 << 5)
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#define BIT_6 (0x1 << 6)
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#define BIT_7 (0x1 << 7)
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#define BIT_8 (0x1 << 8)
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#define BIT_9 (0x1 << 9)
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#define BIT_10 (0x1 << 10)
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#define BIT_11 (0x1 << 11)
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#define BIT_12 (0x1 << 12)
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#define BIT_13 (0x1 << 13)
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#define BIT_14 (0x1 << 14)
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#define BIT_15 (0x1 << 15)
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#define BIT_16 (0x1 << 16)
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#define BIT_17 (0x1 << 17)
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#define BIT_18 (0x1 << 18)
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#define BIT_19 (0x1 << 19)
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#define BIT_20 (0x1 << 20)
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#define BIT_21 (0x1 << 21)
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#define BIT_22 (0x1 << 22)
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#define BIT_23 (0x1 << 23)
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#define BIT_24 (0x1 << 24)
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#define BIT_25 (0x1 << 25)
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#define BIT_26 (0x1 << 26)
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#define BIT_27 (0x1 << 27)
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#define BIT_28 (0x1 << 28)
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#define BIT_29 (0x1 << 29)
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#define BIT_30 (0x1 << 30)
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#define BIT_31 (0x1 << 31)
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struct qla_rx_buf {
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struct mbuf *m_head;
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bus_dmamap_t map;
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bus_addr_t paddr;
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uint32_t handle;
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void *next;
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};
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typedef struct qla_rx_buf qla_rx_buf_t;
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struct qla_rx_ring {
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qla_rx_buf_t rx_buf[NUM_RX_DESCRIPTORS];
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};
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typedef struct qla_rx_ring qla_rx_ring_t;
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struct qla_tx_buf {
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struct mbuf *m_head;
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bus_dmamap_t map;
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};
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typedef struct qla_tx_buf qla_tx_buf_t;
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#define QLA_MAX_SEGMENTS 62 /* maximum # of segs in a sg list */
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#define QLA_MAX_MTU 9000
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#define QLA_STD_FRAME_SIZE 1514
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#define QLA_MAX_TSO_FRAME_SIZE ((64 * 1024 - 1) + 22)
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/* Number of MSIX/MSI Vectors required */
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struct qla_ivec {
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uint32_t sds_idx;
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void *ha;
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struct resource *irq;
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void *handle;
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int irq_rid;
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};
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typedef struct qla_ivec qla_ivec_t;
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#define QLA_WATCHDOG_CALLOUT_TICKS 1
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typedef struct _qla_tx_ring {
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qla_tx_buf_t tx_buf[NUM_TX_DESCRIPTORS];
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uint64_t count;
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} qla_tx_ring_t;
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/*
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* Adapter structure contains the hardware independent information of the
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* pci function.
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*/
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struct qla_host {
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volatile struct {
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volatile uint32_t
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qla_interface_up :1,
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qla_callout_init :1,
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qla_watchdog_active :1,
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qla_watchdog_exit :1,
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qla_watchdog_pause :1,
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stop_rcv :1,
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parent_tag :1,
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lock_init :1;
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} flags;
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volatile uint32_t qla_watchdog_exited;
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volatile uint32_t qla_watchdog_paused;
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volatile uint32_t qla_initiate_recovery;
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device_t pci_dev;
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uint16_t watchdog_ticks;
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uint8_t pci_func;
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uint8_t resvd;
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/* ioctl related */
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struct cdev *ioctl_dev;
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/* register mapping */
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struct resource *pci_reg;
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int reg_rid;
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struct resource *pci_reg1;
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int reg_rid1;
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/* interrupts */
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struct resource *mbx_irq;
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void *mbx_handle;
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int mbx_irq_rid;
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int msix_count;
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qla_ivec_t irq_vec[MAX_SDS_RINGS];
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/* parent dma tag */
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bus_dma_tag_t parent_tag;
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/* interface to o.s */
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struct ifnet *ifp;
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struct ifmedia media;
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uint16_t max_frame_size;
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uint16_t rsrvd0;
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int if_flags;
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/* hardware access lock */
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struct mtx hw_lock;
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volatile uint32_t hw_lock_held;
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/* transmit and receive buffers */
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uint32_t txr_idx; /* index of the current tx ring */
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qla_tx_ring_t tx_ring[NUM_TX_RINGS];
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bus_dma_tag_t tx_tag;
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struct task tx_task;
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struct taskqueue *tx_tq;
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struct callout tx_callout;
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struct mtx tx_lock;
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qla_rx_ring_t rx_ring[MAX_RDS_RINGS];
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bus_dma_tag_t rx_tag;
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uint32_t std_replenish;
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qla_rx_buf_t *rxb_free;
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uint32_t rxb_free_count;
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volatile uint32_t posting;
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/* stats */
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uint32_t err_m_getcl;
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uint32_t err_m_getjcl;
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uint32_t err_tx_dmamap_create;
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uint32_t err_tx_dmamap_load;
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uint32_t err_tx_defrag;
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uint64_t rx_frames;
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uint64_t rx_bytes;
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uint64_t lro_pkt_count;
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uint64_t lro_bytes;
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uint64_t ipv4_lro;
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uint64_t ipv6_lro;
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uint64_t tx_frames;
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uint64_t tx_bytes;
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uint64_t tx_tso_frames;
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uint64_t hw_vlan_tx_frames;
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uint32_t fw_ver_major;
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uint32_t fw_ver_minor;
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uint32_t fw_ver_sub;
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uint32_t fw_ver_build;
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/* hardware specific */
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qla_hw_t hw;
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/* debug stuff */
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volatile const char *qla_lock;
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volatile const char *qla_unlock;
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uint32_t dbg_level;
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uint8_t fw_ver_str[32];
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/* Error Injection Related */
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uint32_t err_inject;
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struct task err_task;
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struct taskqueue *err_tq;
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/* Async Event Related */
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uint32_t async_event;
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struct task async_event_task;
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struct taskqueue *async_event_tq;
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/* Peer Device */
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device_t peer_dev;
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volatile uint32_t msg_from_peer;
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#define QL_PEER_MSG_RESET 0x01
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#define QL_PEER_MSG_ACK 0x02
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};
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typedef struct qla_host qla_host_t;
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/* note that align has to be a power of 2 */
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#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1);
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#define QL_MIN(x, y) ((x < y) ? x : y)
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#define QL_RUNNING(ifp) \
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((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == \
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IFF_DRV_RUNNING)
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/* Return 0, if identical, else 1 */
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#define QL_MAC_CMP(mac1, mac2) \
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((((*(uint32_t *) mac1) == (*(uint32_t *) mac2) && \
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(*(uint16_t *)(mac1 + 4)) == (*(uint16_t *)(mac2 + 4)))) ? 0 : 1)
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#endif /* #ifndef _QL_DEF_H_ */
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