6aad34df02
a floating point instruction into a 6-bit register number for double and quad arguments. Make use of the new INSFPdq_RN macro where apporpriate; this is required for correctly handling the "high" fp registers (>= %f32). Fix a number of bugs related to the handling of the high registers which were caused by using __fpu_[gs]etreg() where __fpu_[gs]etreg64() should be used (the former can only access the low, single-precision, registers). Submitted by: tmm
156 lines
3.8 KiB
C
156 lines
3.8 KiB
C
/*-
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* Copyright (c) 2001 by Thomas Moestl <tmm@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/cpufunc.h>
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#include <machine/frame.h>
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#include <machine/instr.h>
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#include <signal.h>
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#include "__sparc_utrap_private.h"
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#include "fpu_reg.h"
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int
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__emul_insn(struct utrapframe *uf)
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{
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u_long reg, res;
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u_long *addr;
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u_int insn;
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int sig;
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int rd;
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int i;
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sig = 0;
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insn = *(u_int *)uf->uf_pc;
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flushw();
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switch (IF_OP(insn)) {
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case IOP_MISC:
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switch (IF_F3_OP3(insn)) {
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case INS2_POPC:
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if (IF_F3_RS1(insn) != 0) {
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sig = SIGILL;
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break;
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}
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reg = __emul_f3_op2(uf, insn);
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for (i = 0; i < 64; i++)
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res += (reg >> i) & 1;
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__emul_store_reg(uf, IF_F3_RD(insn), res);
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break;
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default:
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sig = SIGILL;
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break;
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}
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break;
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case IOP_LDST:
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switch (IF_F3_OP3(insn)) {
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case INS3_LDQF:
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rd = INSFPdq_RN(IF_F3_RD(insn));
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addr = (u_long *)__emul_f3_memop_addr(uf, insn);
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__fpu_setreg64(rd, addr[0]);
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__fpu_setreg64(rd + 2, addr[1]);
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break;
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case INS3_STQF:
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rd = INSFPdq_RN(IF_F3_RD(insn));
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addr = (u_long *)__emul_f3_memop_addr(uf, insn);
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addr[0] = __fpu_getreg64(rd);
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addr[1] = __fpu_getreg64(rd + 2);
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break;
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default:
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sig = SIGILL;
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break;
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}
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break;
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default:
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sig = SIGILL;
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break;
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}
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return (sig);
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}
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u_long
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__emul_fetch_reg(struct utrapframe *uf, int reg)
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{
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struct frame *frm;
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if (reg == IREG_G0)
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return (0);
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else if (reg < IREG_O0) /* global */
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return (uf->uf_global[reg]);
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else if (reg < IREG_L0) /* out */
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return (uf->uf_out[reg - IREG_O0]);
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else { /* local, in */
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/*
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* The in registers are immediately after the locals in
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* the frame.
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*/
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frm = (struct frame *)(uf->uf_out[6] + SPOFF);
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return (frm->fr_local[reg - IREG_L0]);
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}
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}
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void
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__emul_store_reg(struct utrapframe *uf, int reg, u_long val)
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{
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struct frame *frm;
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if (reg == IREG_G0)
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return;
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if (reg < IREG_O0) /* global */
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uf->uf_global[reg] = val;
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else if (reg < IREG_L0) /* out */
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uf->uf_out[reg - IREG_O0] = val;
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else {
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/*
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* The in registers are immediately after the locals in
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* the frame.
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*/
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frm = (struct frame *)(uf->uf_out[6] + SPOFF);
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frm->fr_local[reg - IREG_L0] = val;
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}
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}
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u_long
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__emul_f3_op2(struct utrapframe *uf, u_int insn)
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{
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if (IF_F3_I(insn) != 0)
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return (IF_SIMM(insn, 13));
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else
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return (__emul_fetch_reg(uf, IF_F3_RS2(insn)));
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}
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u_long
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__emul_f3_memop_addr(struct utrapframe *uf, u_int insn)
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{
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u_long addr;
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addr = __emul_f3_op2(uf, insn) + __emul_fetch_reg(uf, IF_F3_RS1(insn));
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return (addr);
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}
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