107 lines
3.4 KiB
LLVM
107 lines
3.4 KiB
LLVM
; RUN: llc < %s -mtriple arm64-apple-darwin -aarch64-load-store-opt=false -asm-verbose=false -disable-post-ra | FileCheck %s
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; Disable the load/store optimizer to avoid having LDP/STPs and simplify checks.
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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; Check that we don't try to tail-call with a non-forwarded sret parameter.
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declare void @test_explicit_sret(i1024* sret) #0
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; This is the only OK case, where we forward the explicit sret pointer.
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; CHECK-LABEL: _test_tailcall_explicit_sret:
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; CHECK-NEXT: b _test_explicit_sret
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define void @test_tailcall_explicit_sret(i1024* sret %arg) #0 {
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tail call void @test_explicit_sret(i1024* %arg)
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ret void
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}
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; CHECK-LABEL: _test_call_explicit_sret:
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; CHECK-NOT: mov x8
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; CHECK: bl _test_explicit_sret
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; CHECK: ret
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define void @test_call_explicit_sret(i1024* sret %arg) #0 {
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call void @test_explicit_sret(i1024* %arg)
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ret void
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}
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; CHECK-LABEL: _test_tailcall_explicit_sret_alloca_unused:
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; CHECK: mov x8, sp
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; CHECK-NEXT: bl _test_explicit_sret
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; CHECK: ret
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define void @test_tailcall_explicit_sret_alloca_unused() #0 {
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%l = alloca i1024, align 8
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tail call void @test_explicit_sret(i1024* %l)
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ret void
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}
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; CHECK-LABEL: _test_tailcall_explicit_sret_alloca_dummyusers:
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; CHECK: ldr [[PTRLOAD1:x[0-9]+]], [x0]
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; CHECK: str [[PTRLOAD1]], [sp]
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; CHECK: mov x8, sp
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; CHECK-NEXT: bl _test_explicit_sret
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; CHECK: ret
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define void @test_tailcall_explicit_sret_alloca_dummyusers(i1024* %ptr) #0 {
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%l = alloca i1024, align 8
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%r = load i1024, i1024* %ptr, align 8
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store i1024 %r, i1024* %l, align 8
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tail call void @test_explicit_sret(i1024* %l)
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ret void
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}
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; This is too conservative, but doesn't really happen in practice.
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; CHECK-LABEL: _test_tailcall_explicit_sret_gep:
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; CHECK: add x8, x0, #128
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; CHECK-NEXT: bl _test_explicit_sret
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; CHECK: ret
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define void @test_tailcall_explicit_sret_gep(i1024* %ptr) #0 {
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%ptr2 = getelementptr i1024, i1024* %ptr, i32 1
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tail call void @test_explicit_sret(i1024* %ptr2)
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ret void
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}
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; CHECK-LABEL: _test_tailcall_explicit_sret_alloca_returned:
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; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
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; CHECK: mov x8, sp
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; CHECK-NEXT: bl _test_explicit_sret
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; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
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; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
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; CHECK: ret
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define i1024 @test_tailcall_explicit_sret_alloca_returned() #0 {
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%l = alloca i1024, align 8
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tail call void @test_explicit_sret(i1024* %l)
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%r = load i1024, i1024* %l, align 8
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ret i1024 %r
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}
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; CHECK-LABEL: _test_indirect_tailcall_explicit_sret_nosret_arg:
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; CHECK-DAG: mov x[[CALLERX8NUM:[0-9]+]], x8
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; CHECK-DAG: mov [[FPTR:x[0-9]+]], x0
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; CHECK: mov x0, sp
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; CHECK-NEXT: blr [[FPTR]]
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; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
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; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
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; CHECK: ret
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define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret %arg, void (i1024*)* %f) #0 {
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%l = alloca i1024, align 8
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tail call void %f(i1024* %l)
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%r = load i1024, i1024* %l, align 8
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store i1024 %r, i1024* %arg, align 8
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ret void
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}
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; CHECK-LABEL: _test_indirect_tailcall_explicit_sret_:
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; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
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; CHECK: mov x8, sp
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; CHECK-NEXT: blr x0
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; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
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; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
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; CHECK: ret
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define void @test_indirect_tailcall_explicit_sret_(i1024* sret %arg, i1024 ()* %f) #0 {
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%ret = tail call i1024 %f()
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store i1024 %ret, i1024* %arg, align 8
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ret void
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}
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attributes #0 = { nounwind }
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