2edabad8a4
* Support for sam9 "EMAC" controller. * Support for rmii interface to phy. at91.c & at91sam9.c: * Eliminate separate at91sam9.c file. * Add new devices to at91sam9_devs table. at91_machdep.c & at at91sam9_machdep.c: * Automatic chip type determination. * Remove compile time chip dependencies. * Eliminate separate at91sam9_machdep.c file. at91_pmc.c: * Corrected support for all of the sam926? and sam9g20 chips. * Remove compile time chip dependencies. My apologies to Greg for taking so long to take care of it.
504 lines
11 KiB
C
504 lines
11 KiB
C
/*-
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* Copyright (c) 2005 Olivier Houchard. All rights reserved.
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* Copyright (c) 2010 Greg Ansley. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_extern.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91_pmcvar.h>
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#include <arm/at91/at91_aicreg.h>
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static struct at91_softc *at91_softc;
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static void at91_eoi(void *);
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extern const struct pmap_devmap at91_devmap[];
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uint32_t at91_chip_id;
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#ifdef AT91C_MASTER_CLOCK
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uint32_t at91_master_clock = AT91C_MASTER_CLOCK;
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#else
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uint32_t at91_master_clock;
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#endif
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static int
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at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
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bus_space_handle_t *bshp)
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{
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vm_paddr_t pa, endpa;
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pa = trunc_page(bpa);
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if (pa >= 0xfff00000) {
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*bshp = pa - 0xf0000000 + 0xd0000000;
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return (0);
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}
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if (pa >= 0xdff00000)
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return (0);
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endpa = round_page(bpa + size);
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*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
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return (0);
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}
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static void
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at91_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
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{
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vm_offset_t va, endva;
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va = trunc_page((vm_offset_t)t);
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endva = va + round_page(size);
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/* Free the kernel virtual mapping. */
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kmem_free(kernel_map, va, endva - va);
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}
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static int
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at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
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bus_size_t size, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return (0);
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}
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static void
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at91_barrier(void *t, bus_space_handle_t bsh, bus_size_t size, bus_size_t b,
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int a)
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{
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}
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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bs_protos(generic);
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bs_protos(generic_armv4);
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struct bus_space at91_bs_tag = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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at91_bs_map,
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at91_bs_unmap,
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at91_bs_subregion,
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/* allocation/deallocation */
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NULL,
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NULL,
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/* barrier */
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at91_barrier,
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/* read (single) */
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generic_bs_r_1,
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generic_armv4_bs_r_2,
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generic_bs_r_4,
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NULL,
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/* read multiple */
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generic_bs_rm_1,
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generic_armv4_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region */
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generic_bs_rr_1,
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generic_armv4_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) */
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generic_bs_w_1,
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generic_armv4_bs_w_2,
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generic_bs_w_4,
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NULL,
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/* write multiple */
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generic_bs_wm_1,
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generic_armv4_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region */
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NULL,
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generic_armv4_bs_wr_2,
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generic_bs_wr_4,
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NULL,
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/* set multiple */
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NULL,
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NULL,
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NULL,
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NULL,
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/* set region */
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NULL,
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generic_armv4_bs_sr_2,
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generic_bs_sr_4,
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NULL,
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/* copy */
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NULL,
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generic_armv4_bs_c_2,
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NULL,
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NULL,
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/* read (single) stream */
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generic_bs_r_1,
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generic_armv4_bs_r_2,
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generic_bs_r_4,
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NULL,
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/* read multiple stream */
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generic_bs_rm_1,
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generic_armv4_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region stream */
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generic_bs_rr_1,
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generic_armv4_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) stream */
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generic_bs_w_1,
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generic_armv4_bs_w_2,
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generic_bs_w_4,
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NULL,
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/* write multiple stream */
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generic_bs_wm_1,
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generic_armv4_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region stream */
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NULL,
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generic_armv4_bs_wr_2,
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generic_bs_wr_4,
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NULL,
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};
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static int
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at91_probe(device_t dev)
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{
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device_set_desc(dev, "AT91 device bus");
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arm_post_filter = at91_eoi;
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return (0);
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}
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static void
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at91_identify(driver_t *drv, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "atmelarm", 0);
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}
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static int
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at91_attach(device_t dev)
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{
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struct at91_softc *sc = device_get_softc(dev);
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const struct pmap_devmap *pdevmap;
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at91_softc = sc;
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sc->sc_st = &at91_bs_tag;
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sc->sc_sh = AT91_BASE;
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sc->dev = dev;
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sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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sc->sc_irq_rman.rm_descr = "AT91 IRQs";
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if (rman_init(&sc->sc_irq_rman) != 0 ||
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rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)
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panic("at91_attach: failed to set up IRQ rman");
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "AT91 Memory";
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if (rman_init(&sc->sc_mem_rman) != 0)
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panic("at91_attach: failed to set up memory rman");
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for ( pdevmap = at91_devmap; pdevmap->pd_va != 0; pdevmap++) {
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if (rman_manage_region(&sc->sc_mem_rman, pdevmap->pd_va,
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pdevmap->pd_va + pdevmap->pd_size - 1) != 0)
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panic("at91_attach: failed to set up memory rman");
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}
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/* Our device list will be added automatically by the cpu device
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* e.g. at91rm9200.c when it is identified. To ensure that the
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* CPU and PMC are attached first any other "identified" devices
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* call BUS_ADD_CHILD(9) with an "order" of at least 2. */
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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enable_interrupts(I32_bit | F32_bit);
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return (0);
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}
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static struct resource *
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at91_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct at91_softc *sc = device_get_softc(dev);
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struct resource_list_entry *rle;
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struct at91_ivar *ivar = device_get_ivars(child);
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struct resource_list *rl = &ivar->resources;
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if (device_get_parent(child) != dev)
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return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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type, rid, start, end, count, flags));
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rle = resource_list_find(rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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if (rle->res)
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panic("Resource rid %d type %d already in use", *rid, type);
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if (start == 0UL && end == ~0UL) {
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start = rle->start;
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count = ulmax(count, rle->count);
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end = ulmax(rle->end, start + count - 1);
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}
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switch (type)
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{
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case SYS_RES_IRQ:
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rle->res = rman_reserve_resource(&sc->sc_irq_rman,
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start, end, count, flags, child);
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break;
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case SYS_RES_MEMORY:
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rle->res = rman_reserve_resource(&sc->sc_mem_rman,
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start, end, count, flags, child);
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if (rle->res != NULL) {
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rman_set_bustag(rle->res, &at91_bs_tag);
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rman_set_bushandle(rle->res, start);
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}
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break;
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}
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if (rle->res) {
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rle->start = rman_get_start(rle->res);
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rle->end = rman_get_end(rle->res);
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rle->count = count;
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rman_set_rid(rle->res, *rid);
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}
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return (rle->res);
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}
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static struct resource_list *
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at91_get_resource_list(device_t dev, device_t child)
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{
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struct at91_ivar *ivar;
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ivar = device_get_ivars(child);
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return (&(ivar->resources));
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}
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static int
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at91_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r)
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{
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struct resource_list *rl;
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struct resource_list_entry *rle;
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rl = at91_get_resource_list(dev, child);
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if (rl == NULL)
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return (EINVAL);
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rle = resource_list_find(rl, type, rid);
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if (rle == NULL)
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return (EINVAL);
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rman_release_resource(r);
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rle->res = NULL;
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return (0);
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}
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static int
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at91_setup_intr(device_t dev, device_t child,
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struct resource *ires, int flags, driver_filter_t *filt,
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driver_intr_t *intr, void *arg, void **cookiep)
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{
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struct at91_softc *sc = device_get_softc(dev);
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if (rman_get_start(ires) == sc->sc_irq_system && filt == NULL)
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panic("All system interrupt ISRs must be FILTER");
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BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt,
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intr, arg, cookiep);
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bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IECR,
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1 << rman_get_start(ires));
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return (0);
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}
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static int
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at91_teardown_intr(device_t dev, device_t child, struct resource *res,
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void *cookie)
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{
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struct at91_softc *sc = device_get_softc(dev);
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bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR,
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1 << rman_get_start(res));
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
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}
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static int
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at91_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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#if 0
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u_long p;
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int error;
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if (type == SYS_RES_MEMORY) {
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error = bus_space_map(rman_get_bustag(r),
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rman_get_bushandle(r), rman_get_size(r), 0, &p);
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if (error)
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return (error);
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rman_set_bushandle(r, p);
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}
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#endif
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return (rman_activate_resource(r));
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}
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static int
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at91_print_child(device_t dev, device_t child)
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{
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struct at91_ivar *ivars;
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struct resource_list *rl;
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int retval = 0;
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ivars = device_get_ivars(child);
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rl = &ivars->resources;
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retval += bus_print_child_header(dev, child);
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retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx");
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retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
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retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
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if (device_get_flags(dev))
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retval += printf(" flags %#x", device_get_flags(dev));
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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bus_space_write_4(at91_softc->sc_st,
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at91_softc->sc_aic_sh, IC_IDCR, 1 << nb);
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}
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int
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arm_get_next_irq(int last __unused)
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{
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int status;
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int irq;
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irq = bus_space_read_4(at91_softc->sc_st,
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at91_softc->sc_aic_sh, IC_IVR);
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status = bus_space_read_4(at91_softc->sc_st,
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at91_softc->sc_aic_sh, IC_ISR);
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if (status == 0) {
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bus_space_write_4(at91_softc->sc_st,
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at91_softc->sc_aic_sh, IC_EOICR, 1);
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return (-1);
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}
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return (irq);
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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bus_space_write_4(at91_softc->sc_st,
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at91_softc->sc_aic_sh, IC_IECR, 1 << nb);
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bus_space_write_4(at91_softc->sc_st, at91_softc->sc_aic_sh,
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IC_EOICR, 0);
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}
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static void
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at91_eoi(void *unused)
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{
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bus_space_write_4(at91_softc->sc_st, at91_softc->sc_aic_sh,
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IC_EOICR, 0);
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}
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static device_method_t at91_methods[] = {
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DEVMETHOD(device_probe, at91_probe),
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DEVMETHOD(device_attach, at91_attach),
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DEVMETHOD(device_identify, at91_identify),
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DEVMETHOD(bus_alloc_resource, at91_alloc_resource),
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DEVMETHOD(bus_setup_intr, at91_setup_intr),
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DEVMETHOD(bus_teardown_intr, at91_teardown_intr),
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DEVMETHOD(bus_activate_resource, at91_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_get_resource_list,at91_get_resource_list),
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DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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DEVMETHOD(bus_release_resource, at91_release_resource),
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DEVMETHOD(bus_print_child, at91_print_child),
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{0, 0},
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};
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static driver_t at91_driver = {
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"atmelarm",
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at91_methods,
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sizeof(struct at91_softc),
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};
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static devclass_t at91_devclass;
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DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0);
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