dea9afcfae
- Revert r265427. It appears we are halting the DWC OTG host controller schedule if we process events only at every SOF. When doing split transactions we rely on that events are processed quickly and waiting too long might cause data loss. - We are not always able to meet the timing requirements of interrupt endpoint split transactions. Switch from INTERRUPT to CONTROL endpoint type for interrupt endpoint events until further, hence CONTROL endpoint events are more relaxed, reducing the chance of data loss. See comment in code for more in-depth explanation. - Simplify TT scheduling. MFC after: 3 days |
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at91dci_atmelarm.c | ||
at91dci_fdt.c | ||
at91dci.c | ||
at91dci.h | ||
atmegadci_atmelarm.c | ||
atmegadci.c | ||
atmegadci.h | ||
avr32dci.c | ||
avr32dci.h | ||
dwc_otg_fdt.c | ||
dwc_otg.c | ||
dwc_otg.h | ||
dwc_otgreg.h | ||
ehci_fsl.c | ||
ehci_imx.c | ||
ehci_ixp4xx.c | ||
ehci_mv.c | ||
ehci_pci.c | ||
ehci.c | ||
ehci.h | ||
ehcireg.h | ||
musb_otg_atmelarm.c | ||
musb_otg.c | ||
musb_otg.h | ||
ohci_atmelarm.c | ||
ohci_fdt.c | ||
ohci_pci.c | ||
ohci_s3c24x0.c | ||
ohci.c | ||
ohci.h | ||
ohcireg.h | ||
saf1761_otg_boot.c | ||
saf1761_otg_fdt.c | ||
saf1761_otg_reg.h | ||
saf1761_otg.c | ||
saf1761_otg.h | ||
uhci_pci.c | ||
uhci.c | ||
uhci.h | ||
uhcireg.h | ||
usb_controller.c | ||
uss820dci_atmelarm.c | ||
uss820dci.c | ||
uss820dci.h | ||
xhci_pci.c | ||
xhci.c | ||
xhci.h | ||
xhcireg.h |