330bf9c54e
Add support for PFC and implement reading the per priority statistics using the sysctl(8) interface. PFC is used together with VLAN priority and can be enabled and disabled on a per priority basis. Global pause frames and PFC are incompatible features and surrounding logic has been added to warn the user about misconfiguration. Update relevant mlx5core APIs for PFC configuration. MFC after: 1 week Sponsored by: Mellanox Technologies
159 lines
5.6 KiB
C
159 lines
5.6 KiB
C
/*-
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* Copyright (c) 2016, Mellanox Technologies, Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MLX5_PORT_H__
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#define __MLX5_PORT_H__
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#include <dev/mlx5/driver.h>
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enum mlx5_beacon_duration {
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MLX5_BEACON_DURATION_OFF = 0x0,
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MLX5_BEACON_DURATION_INF = 0xffff,
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};
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enum mlx5_module_id {
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MLX5_MODULE_ID_SFP = 0x3,
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MLX5_MODULE_ID_QSFP = 0xC,
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MLX5_MODULE_ID_QSFP_PLUS = 0xD,
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MLX5_MODULE_ID_QSFP28 = 0x11,
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};
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enum mlx5_an_status {
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MLX5_AN_UNAVAILABLE = 0,
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MLX5_AN_COMPLETE = 1,
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MLX5_AN_FAILED = 2,
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MLX5_AN_LINK_UP = 3,
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MLX5_AN_LINK_DOWN = 4,
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};
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#define MLX5_EEPROM_MAX_BYTES 32
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#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
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#define MLX5_EEPROM_REVISION_ID_BYTE_MASK 0x0000ff00
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#define MLX5_EEPROM_PAGE_3_VALID_BIT_MASK 0x00040000
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#define MLX5_I2C_ADDR_LOW 0x50
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#define MLX5_I2C_ADDR_HIGH 0x51
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#define MLX5_EEPROM_PAGE_LENGTH 256
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enum mlx5e_link_mode {
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MLX5E_1000BASE_CX_SGMII = 0,
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MLX5E_1000BASE_KX = 1,
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MLX5E_10GBASE_CX4 = 2,
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MLX5E_10GBASE_KX4 = 3,
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MLX5E_10GBASE_KR = 4,
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MLX5E_20GBASE_KR2 = 5,
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MLX5E_40GBASE_CR4 = 6,
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MLX5E_40GBASE_KR4 = 7,
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MLX5E_56GBASE_R4 = 8,
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MLX5E_10GBASE_CR = 12,
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MLX5E_10GBASE_SR = 13,
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MLX5E_10GBASE_ER = 14,
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MLX5E_40GBASE_SR4 = 15,
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MLX5E_40GBASE_LR4 = 16,
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MLX5E_50GBASE_SR2 = 18,
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MLX5E_100GBASE_CR4 = 20,
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MLX5E_100GBASE_SR4 = 21,
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MLX5E_100GBASE_KR4 = 22,
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MLX5E_100GBASE_LR4 = 23,
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MLX5E_100BASE_TX = 24,
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MLX5E_1000BASE_T = 25,
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MLX5E_10GBASE_T = 26,
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MLX5E_25GBASE_CR = 27,
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MLX5E_25GBASE_KR = 28,
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MLX5E_25GBASE_SR = 29,
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MLX5E_50GBASE_CR2 = 30,
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MLX5E_50GBASE_KR2 = 31,
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MLX5E_LINK_MODES_NUMBER,
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};
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enum mlx5e_connector_type {
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MLX5E_PORT_UNKNOWN = 0,
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MLX5E_PORT_NONE = 1,
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MLX5E_PORT_TP = 2,
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MLX5E_PORT_AUI = 3,
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MLX5E_PORT_BNC = 4,
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MLX5E_PORT_MII = 5,
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MLX5E_PORT_FIBRE = 6,
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MLX5E_PORT_DA = 7,
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MLX5E_PORT_OTHER = 8,
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MLX5E_CONNECTOR_TYPE_NUMBER,
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};
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#define MLX5E_PROT_MASK(link_mode) (1 << (link_mode))
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#define PORT_MODULE_EVENT_MODULE_STATUS_MASK 0xF
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#define PORT_MODULE_EVENT_ERROR_TYPE_MASK 0xF
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int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
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int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
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int ptys_size, int proto_mask, u8 local_port);
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int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
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u32 *proto_cap, int proto_mask);
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int mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask,
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u8 *an_disable_cap, u8 *an_disable_status);
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int mlx5_set_port_autoneg(struct mlx5_core_dev *dev, bool disable,
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u32 eth_proto_admin, int proto_mask);
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int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
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u32 *proto_admin, int proto_mask);
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int mlx5_query_port_eth_proto_oper(struct mlx5_core_dev *dev,
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u32 *proto_oper, u8 local_port);
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int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin,
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int proto_mask);
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int mlx5_set_port_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status status);
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int mlx5_query_port_status(struct mlx5_core_dev *dev, u8 *status);
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int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status *status);
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int mlx5_set_port_pause_and_pfc(struct mlx5_core_dev *dev, u32 port,
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u8 rx_pause, u8 tx_pause,
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u8 pfc_en_rx, u8 pfc_en_tx);
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int mlx5_query_port_pause(struct mlx5_core_dev *dev, u32 port,
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u32 *rx_pause, u32 *tx_pause);
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int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx);
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int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu);
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int mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu);
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int mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu);
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unsigned int mlx5_query_module_status(struct mlx5_core_dev *dev, int module_num);
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int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num);
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int mlx5_query_eeprom(struct mlx5_core_dev *dev, int i2c_addr, int page_num,
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int device_addr, int size, int module_num, u32 *data,
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int *size_read);
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int mlx5_max_tc(struct mlx5_core_dev *mdev);
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int mlx5_query_port_tc_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
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u8 *max_bw_units);
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int mlx5_modify_port_tc_rate_limit(struct mlx5_core_dev *mdev,
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const u8 *max_bw_value,
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const u8 *max_bw_units);
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int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
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u8 prio, u8 *tc);
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int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, int prio_index,
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const u8 prio_tc);
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#endif /* __MLX5_PORT_H__ */
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