dfd1f7fd50
Bump __FreeBSD_version accordingly.
470 lines
15 KiB
C
470 lines
15 KiB
C
/*-
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* Copyright (c) 2002 Adaptec Inc.
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* All rights reserved.
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*
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* Written by: David Jeffery
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/types.h>
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#include <sys/queue.h>
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#include <sys/bio.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/sema.h>
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#include <sys/time.h>
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#include <machine/bus_memio.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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MALLOC_DECLARE(M_IPSBUF);
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/*
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* IPS CONSTANTS
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*/
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#define IPS_VENDOR_ID 0x1014
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#define IPS_VENDOR_ID_ADAPTEC 0x9005
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#define IPS_MORPHEUS_DEVICE_ID 0x01BD
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#define IPS_COPPERHEAD_DEVICE_ID 0x002E
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#define IPS_MARCO_DEVICE_ID 0x0250
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#define IPS_CSL 0xff
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#define IPS_POCL 0x30
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/* amounts of memory to allocate for certain commands */
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#define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t))
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#define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t))
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#define IPS_COMMAND_LEN 24
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#define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
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#define IPS_NVRAM_PAGE_SIZE 128
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/* various flags */
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#define IPS_NOWAIT_FLAG 1
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/* states for the card to be in */
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#define IPS_DEV_OPEN 0x01
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#define IPS_TIMEOUT 0x02 /* command time out, need reset */
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#define IPS_OFFLINE 0x04 /* can't reset card/card failure */
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/* max number of commands set to something low for now */
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#define IPS_MAX_CMD_NUM 128
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#define IPS_MAX_NUM_DRIVES 8
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#define IPS_MAX_SG_ELEMENTS 32
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#define IPS_MAX_IOBUF_SIZE (64 * 1024)
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#define IPS_BLKSIZE 512
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/* logical drive states */
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#define IPS_LD_OFFLINE 0x02
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#define IPS_LD_OKAY 0x03
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#define IPS_LD_DEGRADED 0x04
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#define IPS_LD_FREE 0x00
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#define IPS_LD_SYS 0x06
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#define IPS_LD_CRS 0x24
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/* register offsets */
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#define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */
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#define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */
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#define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */
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#define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */
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#define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */
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#define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */
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#define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */
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#define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */
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#define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */
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#define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */
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#define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */
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#define COPPER_REG_CBSP 0x07 /* ? Reg. */
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#define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */
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#define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/
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#define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */
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#define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */
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#define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */
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#define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */
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#define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */
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/* bit definitions */
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#define MORPHEUS_BIT_POST1 0x01
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#define MORPHEUS_BIT_POST2 0x02
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#define MORPHEUS_BIT_CMD_IRQ 0x08
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#define COPPER_CMD_START 0x101A
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#define COPPER_SEM_BIT 0x08
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#define COPPER_EI_BIT 0x80
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#define COPPER_EBM_BIT 0x02
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#define COPPER_RESET_BIT 0x80
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#define COPPER_GHI_BIT 0x04
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#define COPPER_SCE_BIT 0x01
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#define COPPER_OP_BIT 0x01
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#define COPPER_ILE_BIT 0x10
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/* status defines */
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#define IPS_POST1_OK 0x8000
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#define IPS_POST2_OK 0x000f
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/* command op codes */
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#define IPS_READ_CMD 0x02
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#define IPS_WRITE_CMD 0x03
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#define IPS_ADAPTER_INFO_CMD 0x05
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#define IPS_CACHE_FLUSH_CMD 0x0A
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#define IPS_REBUILD_STATUS_CMD 0x0C
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#define IPS_ERROR_TABLE_CMD 0x17
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#define IPS_DRIVE_INFO_CMD 0x19
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#define IPS_SUBSYS_PARAM_CMD 0x40
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#define IPS_CONFIG_SYNC_CMD 0x58
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#define IPS_SG_READ_CMD 0x82
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#define IPS_SG_WRITE_CMD 0x83
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#define IPS_RW_NVRAM_CMD 0xBC
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#define IPS_FFDC_CMD 0xD7
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/* error information returned by the adapter */
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#define IPS_MIN_ERROR 0x02
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#define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */
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#define IPS_OS_FREEBSD 8
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#define IPS_VERSION_MAJOR "0.90"
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#define IPS_VERSION_MINOR ".10"
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/* Adapter Types */
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#define IPS_ADAPTER_COPPERHEAD 0x01
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#define IPS_ADAPTER_COPPERHEAD2 0x02
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#define IPS_ADAPTER_COPPERHEADOB1 0x03
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#define IPS_ADAPTER_COPPERHEADOB2 0x04
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#define IPS_ADAPTER_CLARINET 0x05
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#define IPS_ADAPTER_CLARINETLITE 0x06
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#define IPS_ADAPTER_TROMBONE 0x07
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#define IPS_ADAPTER_MORPHEUS 0x08
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#define IPS_ADAPTER_MORPHEUSLITE 0x09
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#define IPS_ADAPTER_NEO 0x0A
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#define IPS_ADAPTER_NEOLITE 0x0B
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#define IPS_ADAPTER_SARASOTA2 0x0C
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#define IPS_ADAPTER_SARASOTA1 0x0D
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#define IPS_ADAPTER_MARCO 0x0E
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#define IPS_ADAPTER_SEBRING 0x0F
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#define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING
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/* values for ffdc_settime (from gmtime) */
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#define IPS_SECSPERMIN 60
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#define IPS_MINSPERHOUR 60
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#define IPS_HOURSPERDAY 24
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#define IPS_DAYSPERWEEK 7
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#define IPS_DAYSPERNYEAR 365
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#define IPS_DAYSPERLYEAR 366
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#define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR)
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#define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
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#define IPS_MONSPERYEAR 12
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#define IPS_EPOCH_YEAR 1970
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#define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400)
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#define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
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/*
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* IPS MACROS
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*/
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#define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset)
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#define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset)
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#define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
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#define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
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#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
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#define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
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/* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */
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#define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
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#define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ)
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#define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
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#ifndef IPS_DEBUG
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#define DEVICE_PRINTF(x...)
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#define PRINTF(x...)
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#else
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#define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x)
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#define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x)
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#endif
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/*
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* IPS STRUCTS
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*/
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struct ips_softc;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t drivenum;
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u_int8_t reserve2;
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u_int32_t lba;
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u_int32_t buffaddr;
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u_int32_t reserve3;
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} __attribute__ ((packed)) ips_generic_cmd;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t drivenum;
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u_int8_t segnum;
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u_int32_t lba;
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u_int32_t buffaddr;
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u_int16_t length;
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u_int16_t reserve1;
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} __attribute__ ((packed)) ips_io_cmd;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t pagenum;
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u_int8_t rw;
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u_int32_t reserve1;
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u_int32_t buffaddr;
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u_int32_t reserve3;
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} __attribute__ ((packed)) ips_rw_nvram_cmd;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t drivenum;
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u_int8_t reserve1;
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u_int32_t reserve2;
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u_int32_t buffaddr;
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u_int32_t reserve3;
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} __attribute__ ((packed)) ips_drive_cmd;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t reserve1;
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u_int8_t commandtype;
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u_int32_t reserve2;
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u_int32_t buffaddr;
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u_int32_t reserve3;
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} __attribute__((packed)) ips_adapter_info_cmd;
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typedef struct{
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u_int8_t command;
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u_int8_t id;
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u_int8_t reset_count;
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u_int8_t reset_type;
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u_int8_t second;
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u_int8_t minute;
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u_int8_t hour;
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u_int8_t day;
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u_int8_t reserve1[4];
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u_int8_t month;
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u_int8_t yearH;
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u_int8_t yearL;
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u_int8_t reserve2;
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} __attribute__((packed)) ips_adapter_ffdc_cmd;
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typedef union{
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ips_generic_cmd generic_cmd;
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ips_drive_cmd drive_cmd;
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ips_adapter_info_cmd adapter_info_cmd;
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} ips_cmd_buff_t;
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typedef struct {
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u_int32_t signature;
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u_int8_t reserved;
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u_int8_t adapter_slot;
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u_int16_t adapter_type;
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u_int8_t bios_high[4];
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u_int8_t bios_low[4];
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u_int16_t reserve2;
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u_int8_t reserve3;
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u_int8_t operating_system;
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u_int8_t driver_high[4];
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u_int8_t driver_low[4];
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u_int8_t reserve4[100];
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}__attribute__((packed)) ips_nvram_page5;
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typedef struct{
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u_int32_t addr;
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u_int32_t len;
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} ips_sg_element_t;
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typedef struct{
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u_int8_t drivenum;
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u_int8_t merge_id;
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u_int8_t raid_lvl;
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u_int8_t state;
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u_int32_t sector_count;
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} __attribute__((packed)) ips_drive_t;
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typedef struct{
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u_int8_t drivecount;
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u_int8_t reserve1;
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u_int16_t reserve2;
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ips_drive_t drives[IPS_MAX_NUM_DRIVES];
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}__attribute__((packed)) ips_drive_info_t;
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typedef struct{
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u_int8_t drivecount;
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u_int8_t miscflags;
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u_int8_t SLTflags;
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u_int8_t BSTflags;
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u_int8_t pwr_chg_count;
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u_int8_t wrong_addr_count;
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u_int8_t unident_count;
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u_int8_t nvram_dev_chg_count;
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u_int8_t codeblock_version[8];
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u_int8_t bootblock_version[8];
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u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES];
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u_int8_t max_concurrent_cmds;
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u_int8_t max_phys_devices;
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u_int16_t flash_prog_count;
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u_int8_t defunct_disks;
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u_int8_t rebuildflags;
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u_int8_t offline_drivecount;
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u_int8_t critical_drivecount;
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u_int16_t config_update_count;
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u_int8_t blockedflags;
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u_int8_t psdn_error;
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u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */
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}__attribute__((packed)) ips_adapter_info_t;
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typedef struct {
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u_int32_t status[IPS_MAX_CMD_NUM];
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u_int32_t base_phys_addr;
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int nextstatus;
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bus_dma_tag_t dmatag;
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bus_dmamap_t dmamap;
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} ips_copper_queue_t;
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typedef union {
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struct {
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u_int8_t reserved;
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u_int8_t command_id;
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u_int8_t basic_status;
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u_int8_t extended_status;
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} fields;
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volatile u_int32_t value;
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} ips_cmd_status_t;
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/* used to keep track of current commands to the card */
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typedef struct ips_command{
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u_int8_t command_number;
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u_int8_t id;
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u_int8_t timeout;
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struct ips_softc * sc;
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bus_dmamap_t command_dmamap;
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void * command_buffer;
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u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
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struct sema cmd_sema;
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ips_cmd_status_t status;
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SLIST_ENTRY(ips_command) next;
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bus_dma_tag_t data_dmatag;
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bus_dmamap_t data_dmamap;
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void * data_buffer;
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void * arg;
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void (* callback)(struct ips_command *command);
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}ips_command_t;
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typedef struct ips_wait_list{
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STAILQ_ENTRY(ips_wait_list) next;
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void *data;
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int (* callback)(ips_command_t *command);
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}ips_wait_list_t;
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typedef struct ips_softc{
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struct resource * iores;
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struct resource * irqres;
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struct intr_config_hook ips_ich;
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int configured;
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int state;
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int iotype;
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int rid;
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int irqrid;
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void * irqcookie;
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bus_space_tag_t bustag;
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bus_space_handle_t bushandle;
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bus_dma_tag_t adapter_dmatag;
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bus_dma_tag_t command_dmatag;
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bus_dma_tag_t sg_dmatag;
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device_t dev;
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struct cdev *device_file;
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struct callout_handle timer;
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u_int16_t adapter_type;
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ips_adapter_info_t adapter_info;
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device_t diskdev[IPS_MAX_NUM_DRIVES];
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ips_drive_t drives[IPS_MAX_NUM_DRIVES];
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u_int8_t drivecount;
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u_int16_t ffdc_resetcount;
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struct timeval ffdc_resettime;
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u_int8_t next_drive;
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u_int8_t max_cmds;
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volatile u_int8_t used_commands;
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ips_command_t commandarray[IPS_MAX_CMD_NUM];
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SLIST_HEAD(command_list, ips_command) free_cmd_list;
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STAILQ_HEAD(command_wait_list,ips_wait_list) cmd_wait_list;
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int (* ips_adapter_reinit)(struct ips_softc *sc,
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int force);
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void (* ips_adapter_intr)(void *sc);
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void (* ips_issue_cmd)(ips_command_t *command);
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ips_copper_queue_t * copper_queue;
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struct mtx queue_mtx;
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struct bio_queue_head queue;
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}ips_softc_t;
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/* function defines from ips_ioctl.c */
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extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
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int32_t flags);
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/* function defines from ips_disk.c */
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extern void ipsd_finish(struct bio *iobuf);
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/* function defines from ips_commands.c */
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extern int ips_flush_cache(ips_softc_t *sc);
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extern void ips_start_io_request(ips_softc_t *sc);
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extern int ips_get_drive_info(ips_softc_t *sc);
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extern int ips_get_adapter_info(ips_softc_t *sc);
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extern int ips_ffdc_reset(ips_softc_t *sc);
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extern int ips_update_nvram(ips_softc_t *sc);
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extern int ips_clear_adapter(ips_softc_t *sc);
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/* function defines from ips.c */
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extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *),
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void *data, unsigned long flags);
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extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
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extern int ips_adapter_init(ips_softc_t *sc);
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extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
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extern int ips_adapter_free(ips_softc_t *sc);
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extern void ips_morpheus_intr(void *sc);
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extern void ips_issue_morpheus_cmd(ips_command_t *command);
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extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
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extern void ips_copperhead_intr(void *sc);
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extern void ips_issue_copperhead_cmd(ips_command_t *command);
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