5561e1a135
if the fdt data doesn't provide a gpio pin for reading the write protect switch and also doesn't contain a "wp-disable" property. In r311735 the long-bitrotted code in this driver for using the non- standard fdt "mmchs-wp-gpio-pin" property was replaced with new common support code for handling write-protect and card-detect gpio pins. The old code never found a property with that name, and the logic was to assume that no gpio pin meant that the card was not write protected. The new common code behaves differently. If there is no fdt data saying what to do about sensing write protect, the value in the standard SDHCI PRESENT_STATE register is used. On this hardware, if there is no signal for write protect muxed into the sd controller then that bit in the register indicates write protect. The real problem here is the fdt data, which should contain "wp-disable" properties for eMMC and micro-sd slots where write protect is not even an option in the hardware, but we are not in control of that data, it comes from linux. So we have to make the same flawed assumption in our driver that the corresponding linux driver has: no info means no protect. Reported by: several users on the arm@ list Pointy hat: me, for not testing enough before committing r311735 |
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allwinner | ||
altera/socfpga | ||
amlogic/aml8726 | ||
annapurna/alpine | ||
arm | ||
at91 | ||
broadcom/bcm2835 | ||
cavium/cns11xx | ||
cloudabi32 | ||
conf | ||
freescale | ||
include | ||
lpc | ||
mv | ||
nvidia | ||
qemu | ||
rockchip | ||
samsung/exynos | ||
ti | ||
versatile | ||
xilinx | ||
xscale |