Warner Losh a1e85ec6fb 0 is not an invalid interrupt in the PCI world (just in the ia32 ... world), do not treat it as such. This fixes the alpha boot problem. Reviewed by: drew, des		2002-06-07 15:28:16 +00:00
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eisa_pci.c	Next round of PCI subsystem updates:	2000-12-13 01:25:11 +00:00
fixup_pci.c	Fix reversed arguments to pci_write_config()	2001-06-03 09:45:40 +00:00
ignore_pci.c	Next phase in the PCI subsystem cleanup.	2000-12-08 22:11:23 +00:00
isa_pci.c	Add support for the Intel 82443MX chipset	2001-12-21 01:28:59 +00:00
pci_if.m	Slightly reimplement some recently added helper functions as methods, so	2001-02-27 23:13:20 +00:00
pci_pci.c	Fix an edge case wrt membase, but more changes needed	2002-04-13 05:52:35 +00:00
pci_private.h	Add 5th parameter to pci_read_device specifying the size of the object	2002-03-13 16:32:11 +00:00
pci_user.c	Simple p_ucred -> td_ucred changes to start using the per-thread ucred	2002-02-27 18:32:23 +00:00
pci.c	Use PCI_INTERRUPT_VALI in stead of hard coded 255	2002-06-01 05:48:58 +00:00
pcib_if.m	- Fix the device database parsing code so that it actually works.	2000-12-09 09:15:38 +00:00
pcireg.h	Add some PCI-X register definitions.	2002-06-05 22:25:51 +00:00
pcivar.h	0 is not an invalid interrupt in the PCI world (just in the ia32	2002-06-07 15:28:16 +00:00