gnn acf511e4d0 Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.
Add macros for properly accessing coprocessor 0 registers that
support performance counters.

Reviewed by:	jkoshy rpaulo fabien imp
MFC after:	1 month
2010-03-03 15:05:58 +00:00
..
2009-12-23 23:53:30 +00:00
2010-01-19 11:42:15 +00:00
2010-02-18 05:49:52 +00:00
2009-09-09 00:46:11 +00:00
2009-09-23 14:48:13 +00:00