d1ccb2d7c7
allowing the driver for the host-PCI-bridge to indicate that reenumeration of the PCI busses isn't supported by returning -1 instead of a valid PCI bus number. This is needed in order support both Tomatillo, which don't support reenumeration and thus are apparently intended to be used for independently numbered PCI domains only, and Psycho bridges, whose busses need to be reenumerated on at least some E450, without the #ifndef currently used for sun4v in order to support multiple independently PCI domains. The actual allocation/incrementation of the PCI bus numbers is now done in psycho(4), though it no longer establish a mapping between bus numbers and device nodes like ofw_pci_alloc_busno() did as that functionality wasn't used (but can easily brought back if really needed). The now no longer used sys/sparc64/pci/ofw_pci.c is also removed from sys/conf/files.sun4v as ofw_pci_alloc_busno() wasn't used there in the first place. - In ofw_pci_default_{adjust_busrange,intr_pending}() sanity check that the device has a parent before passing it on. - Make psycho_softcs static to sys/sparc64/pci/psycho.c as it's not used outside of that module. - In sys/sparc64/pci/ofw_pcib_subr.c remove the superfluous inclusion of opt_global.h and correct the debug output for adjusting the subordinate bus number.
148 lines
4.4 KiB
C
148 lines
4.4 KiB
C
/*-
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* Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ofw_pci.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/ofw_bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <sparc64/pci/ofw_pci.h>
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#include <sparc64/pci/ofw_pcib_subr.h>
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void
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ofw_pcib_gen_setup(device_t bridge)
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{
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struct ofw_pcib_gen_softc *sc;
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#ifndef SUN4V
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int secbus;
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#endif
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sc = device_get_softc(bridge);
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sc->ops_pcib_sc.dev = bridge;
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sc->ops_node = ofw_bus_get_node(bridge);
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KASSERT(sc->ops_node != 0,
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("ofw_pcib_gen_setup: no ofw pci parent bus!"));
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/*
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* Setup the secondary bus number register, if supported, by
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* allocating a new unique bus number for it; the firmware
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* preset does not always seem to be correct in that case.
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*/
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#ifndef SUN4V
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secbus = OFW_PCI_ALLOC_BUSNO(bridge);
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if (secbus != -1) {
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pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1);
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pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1);
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pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1);
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sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus);
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}
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#endif
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ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
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sizeof(ofw_pci_intr_t));
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}
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int
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ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin)
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{
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struct ofw_pcib_gen_softc *sc;
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struct ofw_bus_iinfo *ii;
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struct ofw_pci_register reg;
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ofw_pci_intr_t pintr, mintr;
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uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
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sc = device_get_softc(bridge);
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ii = &sc->ops_iinfo;
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if (ii->opi_imapsz > 0) {
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pintr = intpin;
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if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®,
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sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
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maskbuf)) {
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/*
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* If we've found a mapping, return it and don't map
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* it again on higher levels - that causes problems
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* in some cases, and never seems to be required.
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*/
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return (mintr);
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}
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} else if (intpin >= 1 && intpin <= 4) {
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/*
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* When an interrupt map is missing, we need to do the
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* standard PCI swizzle and continue mapping at the parent.
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*/
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return (pcib_route_interrupt(bridge, dev, intpin));
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}
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/* Try at the parent. */
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return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
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bridge)), bridge, intpin));
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}
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phandle_t
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ofw_pcib_gen_get_node(device_t bridge, device_t dev)
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{
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struct ofw_pcib_gen_softc *sc;
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sc = device_get_softc(bridge);
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return (sc->ops_node);
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}
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void
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ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus)
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{
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struct ofw_pcib_gen_softc *sc;
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sc = device_get_softc(bridge);
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if (subbus > sc->ops_pcib_sc.subbus) {
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#ifdef OFW_PCI_DEBUG
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device_printf(bridge,
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"adjusting subordinate bus number from %d to %d\n",
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sc->ops_pcib_sc.subbus, subbus);
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#endif
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pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1);
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sc->ops_pcib_sc.subbus = subbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus);
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}
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}
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