andrew e2a65d5cfa Add support for the uart classes to set their default register shift value. ... This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week		2015-04-11 17:16:23 +00:00
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adm5120_machdep.c
adm5120reg.h
admpci.c
console.c
files.adm5120
if_admsw.c	In order to reduce use of M_EXT outside of the mbuf allocator and	2015-01-06 12:59:37 +00:00
if_admswreg.h
if_admswvar.h
obio.c
obiovar.h
std.adm5120
uart_bus_adm5120.c
uart_cpu_adm5120.c
uart_dev_adm5120.c	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
uart_dev_adm5120.h