160ac8a2f4
compile and many of them may disappear. For example the xlr_boot1_console.c is old code that is ifdef'd out. I will clean these sorts of things up as I make progress on the port. So far the only thing I have I think straightened out is the bits around the interupt handling... and hey that may be broke ;-)
218 lines
4.0 KiB
ArmAsm
218 lines
4.0 KiB
ArmAsm
#include <machine/asm.h>
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/*
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* a0: source address
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* a1: length of the area to checksum
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* a2: partial checksum
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* a3: dst
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*/
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#define src a0
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#define dst a3
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#define sum v0
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.text
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.set noreorder
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.macro CSUM_BIGCHUNK_AND_COPY offset
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pref 0, (\offset+0x0)(a0)
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ld t0, (\offset+0x00)(a0)
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ld t1, (\offset+0x08)(a0)
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.word 0x70481038 /*daddwc v0, v0, t0 */
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.word 0x70491038 /*daddwc v0, v0, t1 */
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ld t0, (\offset + 0x10)(a0)
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ld t1, (\offset + 0x18)(a0)
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.word 0x70481038 /* daddwc v0, v0, t0 */
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.word 0x70491038 /*daddwc v0, v0, t1 */
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.endm
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small_csumcpy: /* unknown src alignment and < 8 bytes to go */
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move a1, t2
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andi t0, a1, 4
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beqz t0, 1f
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andi t0, a1, 2
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ulw t1, (src) /* Still a full word to go */
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daddiu src, 4
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.word 0x70491038 /*daddwc v0, v0, t1 */
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1: move t1, zero
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beqz t0, 1f
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andi t0, a1, 1
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ulhu t1, (src) /* Still a halfword to go */
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daddiu src, 2
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1: beqz t0, 1f
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sll t1, t1, 16
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lbu t2, (src)
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nop
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#ifdef __MIPSEB__
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sll t2, t2, 8
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#endif
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or t1, t2
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1: .word 0x70491038 /*daddwc v0, v0, t1 */
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.word 0x70461038 /*daddwc v0, v0, a2 */
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.word 0x70401038 /*daddwc v0, v0, $0 */
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/* Ideally at this point of time the status flag must be cleared */
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dsll32 v1, sum, 0
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.word 0x70431038 /*daddwc v0, v0, v1 */
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dsrl32 sum, sum, 0
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.word 0x70401038 /*daddwc v0, v0, zero */
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/* fold the checksum */
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sll v1, sum, 16
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addu sum, v1
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sltu v1, sum, v1
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srl sum, sum, 16
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addu sum, v1
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1:
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.set reorder
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jr ra
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.set noreorder
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/* ------------------------------------------------------------------ */
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.align 5
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LEAF(xlr_csum_partial_nocopy)
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move sum, zero
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move t7, zero
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sltiu t8, a1, 0x8
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bnez t8, small_csumcpy /* < 8 bytes to copy */
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move t2, a1
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beqz a1, out
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andi t7, src, 0x1 /* odd buffer? */
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hword_align:
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beqz t7, word_align
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andi t8, src, 0x2
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lbu t0, (src)
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dsubu a1, a1, 0x1
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.word 0x70481038 /*daddwc v0, v0, t0 */
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daddu src, src, 0x1
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andi t8, src, 0x2
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word_align:
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beqz t8, dword_align
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sltiu t8, a1, 56
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lhu t0, (src)
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dsubu a1, a1, 0x2
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.word 0x70481038 /*daddwc v0, v0, t0 */
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sltiu t8, a1, 56
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daddu src, src, 0x2
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dword_align:
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bnez t8, do_end_words
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move t8, a1
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andi t8, src, 0x4
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beqz t8, qword_align
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andi t8, src, 0x8
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lw t0, 0x00(src)
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dsubu a1, a1, 0x4
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.word 0x70481038 /*daddwc v0, v0, t0 */
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daddu src, src, 0x4
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andi t8, src, 0x8
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qword_align:
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beqz t8, oword_align
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andi t8, src, 0x10
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ld t0, 0x00(src)
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dsubu a1, a1, 0x8
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.word 0x70481038 /*daddwc v0, v0, t0 */
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daddu src, src, 0x8
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andi t8, src, 0x10
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oword_align:
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beqz t8, begin_movement
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dsrl t8, a1, 0x7
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ld t3, 0x08(src)
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ld t0, 0x00(src)
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.word 0x704b1038 /*daddwc v0, v0, t3 */
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.word 0x70481038 /*daddwc v0, v0, t0 */
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dsubu a1, a1, 0x10
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daddu src, src, 0x10
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dsrl t8, a1, 0x7
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begin_movement:
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beqz t8, 1f
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andi t2, a1, 0x40
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move_128bytes:
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pref 0, 0x20(a0)
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pref 0, 0x40(a0)
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pref 0, 0x60(a0)
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CSUM_BIGCHUNK_AND_COPY(0x00)
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CSUM_BIGCHUNK_AND_COPY(0x20)
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CSUM_BIGCHUNK_AND_COPY(0x40)
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CSUM_BIGCHUNK_AND_COPY(0x60)
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dsubu t8, t8, 0x01
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bnez t8, move_128bytes /* flag */
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daddu src, src, 0x80
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1:
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beqz t2, 1f
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andi t2, a1, 0x20
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move_64bytes:
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pref 0, 0x20(a0)
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pref 0, 0x40(a0)
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CSUM_BIGCHUNK_AND_COPY(0x00)
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CSUM_BIGCHUNK_AND_COPY(0x20)
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daddu src, src, 0x40
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1:
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beqz t2, do_end_words
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andi t8, a1, 0x1c
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move_32bytes:
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pref 0, 0x20(a0)
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CSUM_BIGCHUNK_AND_COPY(0x00)
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andi t8, a1, 0x1c
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daddu src, src, 0x20
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do_end_words:
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beqz t8, maybe_end_cruft
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dsrl t8, t8, 0x2
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end_words:
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lw t0, (src)
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dsubu t8, t8, 0x1
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.word 0x70481038 /*daddwc v0, v0, t0 */
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bnez t8, end_words
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daddu src, src, 0x4
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maybe_end_cruft:
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andi t2, a1, 0x3
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small_memcpy:
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j small_csumcpy; move a1, t2
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beqz t2, out
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move a1, t2
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end_bytes:
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lb t0, (src)
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dsubu a1, a1, 0x1
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bnez a2, end_bytes
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daddu src, src, 0x1
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out:
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jr ra
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move v0, sum
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END(xlr_csum_partial_nocopy)
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