e808ca4454
control the antenna control bits for the four TX series and the TPC settings for TX series 1, 2, 3. The specifics: * The TPC setting for TX series 0 is handled in ctl0. * TPC is currently disabled, so the per-packet TX power is set via the global per-rate TX power register, not per packet. * The antenna control bits don't matter for AR5416 and later so they should stay 0 (which they currently do); they may be set for Kite but as there's no TX diversity supported at the moment (it requires the NIC to be built with an external antenna switch, matching how antenna diversity is done on legacy NICs), so again keep them 0. This is in preparation for supporting per-rate TPC on the AR5416 and later. The Kite (and soon to come Kiwi) code sets ctl8-11 to 0x0, which doesn't have any effect at the moment. When TPC is enabled it would result in the second, third and fourth TX series attmpts to be done with a TX power of 0. This commit doesn't change that; it'll be followed up with some commits to properly set the TPC registers appropriately. |
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.. | ||
ath_hal | ||
ath_rate | ||
ah_osdep.c | ||
ah_osdep.h | ||
if_ath_ahb.c | ||
if_ath_debug.c | ||
if_ath_debug.h | ||
if_ath_keycache.c | ||
if_ath_keycache.h | ||
if_ath_misc.h | ||
if_ath_pci.c | ||
if_ath_sysctl.c | ||
if_ath_sysctl.h | ||
if_ath_tx_ht.c | ||
if_ath_tx_ht.h | ||
if_ath_tx.c | ||
if_ath_tx.h | ||
if_ath.c | ||
if_athioctl.h | ||
if_athrate.h | ||
if_athvar.h |