ae526637c4
Revert r338177, r338176, r338175, r338174, r338172 After long consultations with re@, core members and mmacy, revert these changes. Followup changes will be made to mark them as deprecated and prent a message about where to find the up-to-date driver. Followup commits will be made to make this clear in the installer. Followup commits to reduce POLA in ways we're still exploring. It's anticipated that after the freeze, this will be removed in 13-current (with the residual of the drm2 code copied to sys/arm/dev/drm2 for the TEGRA port's use w/o the intel or radeon drivers). Due to the impending freeze, there was no formal core vote for this. I've been talking to different core members all day, as well as Matt Macey and Glen Barber. Nobody is completely happy, all are grudgingly going along with this. Work is in progress to mitigate the negative effects as much as possible. Requested by: re@ (gjb, rgrimes)
157 lines
4.5 KiB
C
157 lines
4.5 KiB
C
/*
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* Copyright © 2009 Keith Packard
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
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*
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/drm2/drmP.h>
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#include <dev/drm2/drm_dp_helper.h>
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/**
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* DOC: dp helpers
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*
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* These functions contain some common logic and helpers at various abstraction
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* levels to deal with Display Port sink devices and related things like DP aux
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* channel transfers, EDID reading over DP aux channels, decoding certain DPCD
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* blocks, ...
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*/
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/* Helpers for DP link training */
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static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r)
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{
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return link_status[r - DP_LANE0_1_STATUS];
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}
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static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_LANE0_1_STATUS + (lane >> 1);
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int s = (lane & 1) * 4;
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u8 l = dp_link_status(link_status, i);
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return (l >> s) & 0xf;
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}
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bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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u8 lane_align;
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u8 lane_status;
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int lane;
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lane_align = dp_link_status(link_status,
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DP_LANE_ALIGN_STATUS_UPDATED);
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if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
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return false;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
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return false;
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}
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return true;
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}
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EXPORT_SYMBOL(drm_dp_channel_eq_ok);
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bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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int lane;
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u8 lane_status;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_LANE_CR_DONE) == 0)
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return false;
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}
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return true;
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}
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EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
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u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
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DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
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u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
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DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
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void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
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if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
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udelay(100);
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else
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mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
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}
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EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
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void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
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if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
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udelay(400);
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else
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mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
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}
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EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
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u8 drm_dp_link_rate_to_bw_code(int link_rate)
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{
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switch (link_rate) {
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case 162000:
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default:
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return DP_LINK_BW_1_62;
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case 270000:
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return DP_LINK_BW_2_7;
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case 540000:
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return DP_LINK_BW_5_4;
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}
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}
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EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
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int drm_dp_bw_code_to_link_rate(u8 link_bw)
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{
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switch (link_bw) {
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case DP_LINK_BW_1_62:
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default:
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return 162000;
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case DP_LINK_BW_2_7:
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return 270000;
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case DP_LINK_BW_5_4:
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return 540000;
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}
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}
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EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
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