494278bb26
On arm64 the eret instruction is used to return from an exception handler. Some implementations may speculate past this instruction into the next function. As the user may control many registers in these functions add a synchronisation barrier sequence after the eret instruction to stop these CPUs from speculating out of the exception handler. PR: 242676 Submitted by: Anthony Steinhauser <asteinhauser@google.com> (previous version) MFC after: 1 week
106 lines
3.4 KiB
C
106 lines
3.4 KiB
C
/*-
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* Copyright (c) 2014 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ASM_H_
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#define _MACHINE_ASM_H_
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#undef __FBSDID
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#if !defined(lint) && !defined(STRIP_FBSDID)
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#define __FBSDID(s) .ident s
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#else
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#define __FBSDID(s) /* nothing */
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#endif
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#define _C_LABEL(x) x
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#define ENTRY(sym) \
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.text; .globl sym; .align 2; .type sym,#function; sym:
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#define EENTRY(sym) \
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.globl sym; sym:
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#define END(sym) .size sym, . - sym
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#define EEND(sym)
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#define WEAK_REFERENCE(sym, alias) \
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.weak alias; \
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.set alias,sym
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#define UINT64_C(x) (x)
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#if defined(PIC)
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#define PIC_SYM(x,y) x ## @ ## y
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#else
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#define PIC_SYM(x,y) x
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#endif
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/* Alias for link register x30 */
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#define lr x30
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/*
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* Sets the trap fault handler. The exception handler will return to the
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* address in the handler register on a data abort or the xzr register to
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* clear the handler. The tmp parameter should be a register able to hold
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* the temporary data.
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*/
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#define SET_FAULT_HANDLER(handler, tmp) \
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ldr tmp, [x18, #PC_CURTHREAD]; /* Load curthread */ \
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ldr tmp, [tmp, #TD_PCB]; /* Load the pcb */ \
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str handler, [tmp, #PCB_ONFAULT] /* Set the handler */
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#define ENTER_USER_ACCESS(reg, tmp) \
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ldr tmp, =has_pan; /* Get the addr of has_pan */ \
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ldr reg, [tmp]; /* Read it */ \
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cbz reg, 997f; /* If no PAN skip */ \
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.inst 0xd500409f | (0 << 8); /* Clear PAN */ \
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997:
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#define EXIT_USER_ACCESS(reg) \
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cbz reg, 998f; /* If no PAN skip */ \
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.inst 0xd500409f | (1 << 8); /* Set PAN */ \
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998:
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#define EXIT_USER_ACCESS_CHECK(reg, tmp) \
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ldr tmp, =has_pan; /* Get the addr of has_pan */ \
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ldr reg, [tmp]; /* Read it */ \
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cbz reg, 999f; /* If no PAN skip */ \
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.inst 0xd500409f | (1 << 8); /* Set PAN */ \
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999:
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/*
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* Some AArch64 CPUs speculate past an eret instruction. As the user may
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* control the registers at this point add a speculation barrier usable on
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* all AArch64 CPUs after the eret instruction.
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* TODO: ARMv8.5 adds a specific instruction for this, we could use that
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* if we know we are running on something that supports it.
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*/
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#define ERET \
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eret; \
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dsb sy; \
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isb
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#endif /* _MACHINE_ASM_H_ */
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