835cb387cc
Expand the support for PCI INTx interrupts including providing interrupt routing information for INTx interrupts to I/O APIC pins and enabling INTx interrupts in the virtio and AHCI backends.
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/*-
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* Copyright (c) 2012 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <stdio.h>
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#include "bhyverun.h"
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#include "pci_emul.h"
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#include "uart_emul.h"
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/*
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* Pick a PCI vid/did of a chip with a single uart at
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* BAR0, that most versions of FreeBSD can understand:
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* Siig CyberSerial 1-port.
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*/
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#define COM_VENDOR 0x131f
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#define COM_DEV 0x2000
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static void
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pci_uart_intr_assert(void *arg)
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{
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struct pci_devinst *pi = arg;
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pci_lintr_assert(pi);
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}
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static void
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pci_uart_intr_deassert(void *arg)
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{
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struct pci_devinst *pi = arg;
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pci_lintr_deassert(pi);
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}
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static void
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pci_uart_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
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int baridx, uint64_t offset, int size, uint64_t value)
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{
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assert(baridx == 0);
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assert(size == 1);
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uart_write(pi->pi_arg, offset, value);
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}
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uint64_t
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pci_uart_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
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int baridx, uint64_t offset, int size)
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{
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uint8_t val;
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assert(baridx == 0);
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assert(size == 1);
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val = uart_read(pi->pi_arg, offset);
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return (val);
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}
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static int
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pci_uart_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
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{
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struct uart_softc *sc;
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pci_emul_alloc_bar(pi, 0, PCIBAR_IO, UART_IO_BAR_SIZE);
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pci_lintr_request(pi);
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/* initialize config space */
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pci_set_cfgdata16(pi, PCIR_DEVICE, COM_DEV);
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pci_set_cfgdata16(pi, PCIR_VENDOR, COM_VENDOR);
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pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_SIMPLECOMM);
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sc = uart_init(pci_uart_intr_assert, pci_uart_intr_deassert, pi);
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pi->pi_arg = sc;
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if (uart_set_backend(sc, opts) != 0) {
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fprintf(stderr, "Unable to initialize backend '%s' for "
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"pci uart at %d:%d\n", opts, pi->pi_slot, pi->pi_func);
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return (-1);
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}
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return (0);
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}
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struct pci_devemu pci_de_com = {
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.pe_emu = "uart",
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.pe_init = pci_uart_init,
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.pe_barwrite = pci_uart_write,
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.pe_barread = pci_uart_read
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};
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PCI_EMUL_SET(pci_de_com);
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