ac757f20dd
introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
1249 lines
37 KiB
C
1249 lines
37 KiB
C
/*-
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* Copyright (c) 2005, M. Warner Losh
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Notes for adding media support. Each chipset is somewhat different
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* from the others. Linux has a table of OIDs that it uses to see what
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* supports the misc register of the NS83903. But a sampling of datasheets
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* I could dig up on cards I own paints a different picture.
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*
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* Chipset specific details:
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* NS 83903/902A paired
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* ccr base 0x1020
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* id register at 0x1000: 7-3 = 0, 2-0 = 1.
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* (maybe this test is too week)
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* misc register at 0x018:
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* 6 WAIT_TOUTENABLE enable watchdog timeout
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* 3 AUI/TPI 1 AUX, 0 TPI
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* 2 loopback
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* 1 gdlink (tpi mode only) 1 tp good, 0 tp bad
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* 0 0-no mam, 1 mam connected
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*
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* NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
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* and the NEC PC9801N-J12 ccr base 0x2000!
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*
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* winbond 289c926
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* ccr base 0xfd0
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* cfb (am 0xff2):
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* 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
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* 2 LNKEN 0 - enable link and auto switch, 1 disable
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* 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0
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* sr (am 0xff4)
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* 88 00 88 00 88 00, etc
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*
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* TMI tc3299a (cr PHY01 == 0)
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* ccr base 0x3f8
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* cra (io 0xa)
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* crb (io 0xb)
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* 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI
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* 2 GDLINK 1 disable checking of link
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* 6 LINK 0 bad link, 1 good link
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*
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* EN5017A, EN5020 no data, but very popular
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* Other chips?
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* NetBSD supports RTL8019, but none have surfaced that I can see
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/socket.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/uio.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_mib.h>
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#include <net/if_media.h>
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#include <dev/ed/if_edreg.h>
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#include <dev/ed/if_edvar.h>
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#include <dev/ed/ax88x90reg.h>
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#include <dev/ed/dl100xxreg.h>
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#include <dev/ed/tc5299jreg.h>
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#include <dev/pccard/pccardvar.h>
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#include <dev/pccard/pccardreg.h>
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#include <dev/pccard/pccard_cis.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "card_if.h"
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/* "device miibus" required. See GENERIC if you get errors here. */
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#include "miibus_if.h"
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#include "pccarddevs.h"
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/*
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* NE-2000 based PC Cards have a number of ways to get the MAC address.
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* Some cards encode this as a FUNCE. Others have this in the ROMs the
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* same way that ISA cards do. Some have it encoded in the attribute
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* memory somewhere that isn't in the CIS. Some new chipsets have it
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* in special registers in the ASIC part of the chip.
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*
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* For those cards that have the MAC adress stored in attribute memory
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* outside of a FUNCE entry in the CIS, nearly all of them have it at
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* a fixed offset (0xff0). We use that offset as a source of last
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* resource if other offsets have failed. This is the address of the
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* National Semiconductor DP83903A, which is the only chip's datasheet
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* I've found.
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*/
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#define ED_DEFAULT_MAC_OFFSET 0xff0
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static const struct ed_product {
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struct pccard_product prod;
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int flags;
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#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */
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#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */
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#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */
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#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */
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#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */
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#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */
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#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */
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int enoff;
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} ed_pccard_products[] = {
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{ PCMCIA_CARD(ACCTON, EN2212), 0},
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{ PCMCIA_CARD(ACCTON, EN2216), 0},
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{ PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
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{ PCMCIA_CARD(AMBICOM, AMB8002), 0},
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{ PCMCIA_CARD(AMBICOM, AMB8002T), 0},
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{ PCMCIA_CARD(AMBICOM, AMB8010), 0},
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{ PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0},
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{ PCMCIA_CARD(AMBICOM, AMB8610), 0},
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{ PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
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{ PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(BILLIONTON, LNT10TB), 0},
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{ PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
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{ PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(BROMAX, IPORT), 0},
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{ PCMCIA_CARD(BROMAX, IPORT2), 0},
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{ PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
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{ PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
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{ PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
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{ PCMCIA_CARD(CNET, NE2000), 0},
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{ PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(COMPEX, LANMODEM), 0},
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{ PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
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{ PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
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{ PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
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{ PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
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{ PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
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{ PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
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{ PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
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{ PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(COREGA, LAPCCTXD), 0},
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{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
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{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
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{ PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC },
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{ PCMCIA_CARD(DLINK, DE660), 0 },
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{ PCMCIA_CARD(DLINK, DE660PLUS), 0},
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{ PCMCIA_CARD(DYNALINK, L10C), 0},
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{ PCMCIA_CARD(EDIMAX, EP4000A), 0},
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{ PCMCIA_CARD(EPSON, EEN10B), 0},
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{ PCMCIA_CARD(EXP, THINLANCOMBO), 0},
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{ PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
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{ PCMCIA_CARD(GREY_CELL, TDK3000), 0},
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{ PCMCIA_CARD(GREY_CELL, DMF650TX),
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NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
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{ PCMCIA_CARD(GVC, NIC_2000P), 0},
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{ PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
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{ PCMCIA_CARD(IBM, INFOMOVER), 0},
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{ PCMCIA_CARD(IODATA3, PCLAT), 0},
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{ PCMCIA_CARD(KINGSTON, CIO10T), 0},
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{ PCMCIA_CARD(KINGSTON, KNE2), 0},
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{ PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
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/* Same ID for many different cards, including generic NE2000 */
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{ PCMCIA_CARD(LINKSYS, COMBO_ECARD),
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NE2000DVF_DL100XX | NE2000DVF_AX88X90},
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{ PCMCIA_CARD(LINKSYS, ECARD_1), 0},
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{ PCMCIA_CARD(LINKSYS, ECARD_2), 0},
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{ PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
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{ PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
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{ PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
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{ PCMCIA_CARD(MAGICRAM, ETHER), 0},
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{ PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(MELCO2, LPC2_T), 0},
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{ PCMCIA_CARD(MELCO2, LPC2_TX), 0},
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{ PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
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{ PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
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{ PCMCIA_CARD(NDC, ND5100_E), 0},
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{ PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
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/* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */
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{ PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
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{ PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
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{ PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC},
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{ PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0},
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{ PCMCIA_CARD(OEM2, 100BASE), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(OEM2, ETHERNET), 0},
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{ PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(OEM2, NE2000), 0},
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{ PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
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{ PCMCIA_CARD(PREMAX, PE200), 0},
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{ PCMCIA_CARD(PSION, LANGLOBAL),
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NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
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{ PCMCIA_CARD(RACORE, ETHERNET), 0},
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{ PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
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{ PCMCIA_CARD(RELIA, COMBO), 0},
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{ PCMCIA_CARD(RIOS, PCCARD3), 0},
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{ PCMCIA_CARD(RPTI, EP400), 0},
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{ PCMCIA_CARD(RPTI, EP401), 0},
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{ PCMCIA_CARD(SMC, EZCARD), 0},
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{ PCMCIA_CARD(SOCKET, EA_ETHER), 0},
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{ PCMCIA_CARD(SOCKET, ES_1000), 0},
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{ PCMCIA_CARD(SOCKET, LP_ETHER), 0},
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{ PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
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{ PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
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{ PCMCIA_CARD(SVEC, COMBOCARD), 0},
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{ PCMCIA_CARD(SVEC, LANCARD), 0},
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{ PCMCIA_CARD(TAMARACK, ETHERNET), 0},
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{ PCMCIA_CARD(TDK, CFE_10), 0},
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{ PCMCIA_CARD(TDK, LAK_CD031), 0},
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{ PCMCIA_CARD(TDK, DFL5610WS), 0},
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{ PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
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{ PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
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{ PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
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{ PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
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{ PCMCIA_CARD(ZONET, ZEN), 0},
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{ { NULL } }
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};
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/*
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* PC Card (PCMCIA) specific code.
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*/
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static int ed_pccard_probe(device_t);
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static int ed_pccard_attach(device_t);
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static void ed_pccard_tick(struct ed_softc *);
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static int ed_pccard_dl100xx(device_t dev, const struct ed_product *);
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static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
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static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
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static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
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int nbits);
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static int ed_pccard_ax88x90(device_t dev, const struct ed_product *);
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static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
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static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
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int nbits);
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static int ed_miibus_readreg(device_t dev, int phy, int reg);
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static int ed_ifmedia_upd(struct ifnet *);
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static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static int ed_pccard_tc5299j(device_t dev, const struct ed_product *);
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static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
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static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
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int nbits);
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static void
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ed_pccard_print_entry(const struct ed_product *pp)
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{
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int i;
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printf("Product entry: ");
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if (pp->prod.pp_name)
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printf("name='%s',", pp->prod.pp_name);
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printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
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pp->prod.pp_product);
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for (i = 0; i < 4; i++)
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if (pp->prod.pp_cis[i])
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printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
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printf("\n");
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}
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static int
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ed_pccard_probe(device_t dev)
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{
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const struct ed_product *pp, *pp2;
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int error, first = 1;
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uint32_t fcn = PCCARD_FUNCTION_UNSPEC;
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/* Make sure we're a network function */
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error = pccard_get_function(dev, &fcn);
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if (error != 0)
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return (error);
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if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
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(const struct pccard_product *) ed_pccard_products,
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sizeof(ed_pccard_products[0]), NULL)) != NULL) {
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if (pp->prod.pp_name != NULL)
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device_set_desc(dev, pp->prod.pp_name);
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/*
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* Some devices don't ID themselves as network, but
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* that's OK if the flags say so.
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*/
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if (!(pp->flags & NE2000DVF_ANYFUNC) &&
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fcn != PCCARD_FUNCTION_NETWORK)
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return (ENXIO);
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/*
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* Some devices match multiple entries. Report that
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* as a warning to help cull the table
|
|
*/
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pp2 = pp;
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while ((pp2 = (const struct ed_product *)pccard_product_lookup(
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dev, (const struct pccard_product *)(pp2 + 1),
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sizeof(ed_pccard_products[0]), NULL)) != NULL) {
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if (first) {
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device_printf(dev,
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"Warning: card matches multiple entries. Report to imp@freebsd.org\n");
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ed_pccard_print_entry(pp);
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first = 0;
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}
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ed_pccard_print_entry(pp2);
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}
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return (0);
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}
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return (ENXIO);
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}
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|
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static int
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ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
|
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{
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struct ed_softc *sc = device_get_softc(dev);
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uint8_t romdata[32], sum;
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int i;
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|
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/*
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* Read in the rom data at location 0. Since there are no
|
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* NE-1000 based PC Card devices, we'll assume we're 16-bit.
|
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*
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* In researching what format this takes, I've found that the
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* following appears to be true for multiple cards based on
|
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* observation as well as datasheet digging.
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*
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* Data is stored in some ROM and is copied out 8 bits at a time
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* into 16-bit wide locations. This means that the odd locations
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* of the ROM are not used (and can be either 0 or ff).
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*
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* The contents appears to be as follows:
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* PROM RAM
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* Offset Offset What
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* 0 0 ENETADDR 0
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* 1 2 ENETADDR 1
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* 2 4 ENETADDR 2
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* 3 6 ENETADDR 3
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* 4 8 ENETADDR 4
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* 5 10 ENETADDR 5
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* 6-13 12-26 Reserved (varies by manufacturer)
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* 14 28 0x57
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* 15 30 0x57
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*
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* Some manufacturers have another image of enetaddr from
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* PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
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* this doesn't appear to be universally documented in the
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* datasheets. Some manufactuers have a card type, card config
|
|
* checksums, etc encoded into PROM offset 6-13, but deciphering it
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|
* requires more knowledge about the exact underlying chipset than
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* we possess (and maybe can possess).
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*/
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ed_pio_readmem(sc, 0, romdata, 32);
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if (bootverbose)
|
|
device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
|
|
if (romdata[28] != 0x57 || romdata[30] != 0x57)
|
|
return (0);
|
|
for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
|
|
sum |= romdata[i * 2];
|
|
if (sum == 0)
|
|
return (0);
|
|
for (i = 0; i < ETHER_ADDR_LEN; i++)
|
|
enaddr[i] = romdata[i * 2];
|
|
return (1);
|
|
}
|
|
|
|
static int
|
|
ed_pccard_add_modem(device_t dev)
|
|
{
|
|
device_printf(dev, "Need to write this code\n");
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ed_pccard_kick_phy(struct ed_softc *sc)
|
|
{
|
|
struct mii_softc *miisc;
|
|
struct mii_data *mii;
|
|
|
|
/*
|
|
* Many of the PHYs that wind up on PC Cards are weird in
|
|
* this way. Generally, we don't need to worry so much about
|
|
* the Isolation protocol since there's only one PHY in
|
|
* these designs, so this workaround is reasonable.
|
|
*/
|
|
mii = device_get_softc(sc->miibus);
|
|
LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
|
|
miisc->mii_flags |= MIIF_FORCEANEG;
|
|
mii_phy_reset(miisc);
|
|
}
|
|
return (mii_mediachg(mii));
|
|
}
|
|
|
|
static int
|
|
ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
|
|
{
|
|
struct mii_data *mii;
|
|
|
|
if (sc->miibus == NULL)
|
|
return (EINVAL);
|
|
mii = device_get_softc(sc->miibus);
|
|
return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
|
|
}
|
|
|
|
|
|
static void
|
|
ed_pccard_mediachg(struct ed_softc *sc)
|
|
{
|
|
struct mii_data *mii;
|
|
|
|
if (sc->miibus == NULL)
|
|
return;
|
|
mii = device_get_softc(sc->miibus);
|
|
mii_mediachg(mii);
|
|
}
|
|
|
|
static int
|
|
ed_pccard_attach(device_t dev)
|
|
{
|
|
u_char sum;
|
|
u_char enaddr[ETHER_ADDR_LEN];
|
|
const struct ed_product *pp;
|
|
int error, i, flags, port_rid, modem_rid;
|
|
struct ed_softc *sc = device_get_softc(dev);
|
|
u_long size;
|
|
static uint16_t *intr_vals[] = {NULL, NULL};
|
|
|
|
sc->dev = dev;
|
|
if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
|
|
(const struct pccard_product *) ed_pccard_products,
|
|
sizeof(ed_pccard_products[0]), NULL)) == NULL) {
|
|
printf("Can't find\n");
|
|
return (ENXIO);
|
|
}
|
|
modem_rid = port_rid = -1;
|
|
if (pp->flags & NE2000DVF_MODEM) {
|
|
for (i = 0; i < 4; i++) {
|
|
size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
|
|
if (size == ED_NOVELL_IO_PORTS)
|
|
port_rid = i;
|
|
else if (size == 8)
|
|
modem_rid = i;
|
|
}
|
|
if (port_rid == -1) {
|
|
device_printf(dev, "Cannot locate my ports!\n");
|
|
return (ENXIO);
|
|
}
|
|
} else {
|
|
port_rid = 0;
|
|
}
|
|
/* Allocate the port resource during setup. */
|
|
error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS);
|
|
if (error) {
|
|
printf("alloc_port failed\n");
|
|
return (error);
|
|
}
|
|
if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) {
|
|
port_rid++;
|
|
sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT,
|
|
&port_rid, 0ul, ~0ul, 1, RF_ACTIVE);
|
|
if (sc->port_res2 == NULL ||
|
|
rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) {
|
|
error = ENXIO;
|
|
goto bad;
|
|
}
|
|
}
|
|
error = ed_alloc_irq(dev, 0, 0);
|
|
if (error)
|
|
goto bad;
|
|
|
|
/*
|
|
* Determine which chipset we are. Almost all the PC Card chipsets
|
|
* have the Novel ASIC and NIC offsets. There's 2 known cards that
|
|
* follow the WD80x3 conventions, which are handled as a special case.
|
|
*/
|
|
sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
|
|
sc->nic_offset = ED_NOVELL_NIC_OFFSET;
|
|
error = ENXIO;
|
|
flags = device_get_flags(dev);
|
|
if (error != 0)
|
|
error = ed_pccard_dl100xx(dev, pp);
|
|
if (error != 0)
|
|
error = ed_pccard_ax88x90(dev, pp);
|
|
if (error != 0)
|
|
error = ed_pccard_tc5299j(dev, pp);
|
|
if (error != 0) {
|
|
error = ed_probe_Novell_generic(dev, flags);
|
|
printf("Novell probe generic %d\n", error);
|
|
}
|
|
if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
|
|
flags |= ED_FLAGS_TOSH_ETHER;
|
|
flags |= ED_FLAGS_PCCARD;
|
|
sc->asic_offset = ED_WD_ASIC_OFFSET;
|
|
sc->nic_offset = ED_WD_NIC_OFFSET;
|
|
error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
|
|
}
|
|
if (error)
|
|
goto bad;
|
|
|
|
/*
|
|
* There are several ways to get the MAC address for the card.
|
|
* Some of the above probe routines can fill in the enaddr. If
|
|
* not, we run through a number of 'well known' locations:
|
|
* (1) From the PC Card FUNCE
|
|
* (2) From offset 0 in the shared memory
|
|
* (3) From a hinted offset in attribute memory
|
|
* (4) From 0xff0 in attribute memory
|
|
* If we can't get a non-zero MAC address from this list, we fail.
|
|
*/
|
|
for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
|
|
sum |= sc->enaddr[i];
|
|
if (sum == 0) {
|
|
pccard_get_ether(dev, enaddr);
|
|
if (bootverbose)
|
|
device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
|
|
for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
|
|
sum |= enaddr[i];
|
|
if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
|
|
if (bootverbose)
|
|
device_printf(dev, "ROM mac %6D\n", enaddr,
|
|
":");
|
|
sum++;
|
|
}
|
|
if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
|
|
for (i = 0; i < ETHER_ADDR_LEN; i++) {
|
|
pccard_attr_read_1(dev, pp->enoff + i * 2,
|
|
enaddr + i);
|
|
sum |= enaddr[i];
|
|
}
|
|
if (bootverbose)
|
|
device_printf(dev, "Hint %x MAC %6D\n",
|
|
pp->enoff, enaddr, ":");
|
|
}
|
|
if (sum == 0) {
|
|
for (i = 0; i < ETHER_ADDR_LEN; i++) {
|
|
pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
|
|
i * 2, enaddr + i);
|
|
sum |= enaddr[i];
|
|
}
|
|
if (bootverbose)
|
|
device_printf(dev, "Fallback MAC %6D\n",
|
|
enaddr, ":");
|
|
}
|
|
if (sum == 0) {
|
|
device_printf(dev, "Cannot extract MAC address.\n");
|
|
ed_release_resources(dev);
|
|
return (ENXIO);
|
|
}
|
|
bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
|
|
}
|
|
|
|
error = ed_attach(dev);
|
|
if (error)
|
|
goto bad;
|
|
if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
|
|
sc->chip_type == ED_CHIP_TYPE_DL10022) {
|
|
/* Try to attach an MII bus, but ignore errors. */
|
|
ed_pccard_dl100xx_mii_reset(sc);
|
|
(void)mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd,
|
|
ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY,
|
|
MII_OFFSET_ANY, 0);
|
|
} else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
|
|
sc->chip_type == ED_CHIP_TYPE_AX88790 ||
|
|
sc->chip_type == ED_CHIP_TYPE_TC5299J) {
|
|
error = mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd,
|
|
ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY,
|
|
MII_OFFSET_ANY, 0);
|
|
if (error != 0) {
|
|
device_printf(dev, "attaching PHYs failed\n");
|
|
goto bad;
|
|
}
|
|
}
|
|
if (sc->miibus != NULL) {
|
|
sc->sc_tick = ed_pccard_tick;
|
|
sc->sc_mediachg = ed_pccard_mediachg;
|
|
sc->sc_media_ioctl = ed_pccard_media_ioctl;
|
|
ed_pccard_kick_phy(sc);
|
|
} else {
|
|
ed_gen_ifmedia_init(sc);
|
|
}
|
|
if (modem_rid != -1)
|
|
ed_pccard_add_modem(dev);
|
|
|
|
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
|
|
NULL, edintr, sc, &sc->irq_handle);
|
|
if (error) {
|
|
device_printf(dev, "setup intr failed %d \n", error);
|
|
goto bad;
|
|
}
|
|
|
|
return (0);
|
|
bad:
|
|
ed_detach(dev);
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
|
|
* and compatible cards (DL10019C Ethernet controller).
|
|
*/
|
|
static int
|
|
ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
|
|
{
|
|
struct ed_softc *sc = device_get_softc(dev);
|
|
u_char sum;
|
|
uint8_t id;
|
|
u_int memsize;
|
|
int i, error;
|
|
|
|
if (!(pp->flags & NE2000DVF_DL100XX))
|
|
return (ENXIO);
|
|
if (bootverbose)
|
|
device_printf(dev, "Trying DL100xx probing\n");
|
|
error = ed_probe_Novell_generic(dev, device_get_flags(dev));
|
|
if (bootverbose && error)
|
|
device_printf(dev, "Novell generic probe failed: %d\n", error);
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
/*
|
|
* Linksys registers(offset from ASIC base)
|
|
*
|
|
* 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
|
|
* 0x0A : Card ID Register (CIR)
|
|
* 0x0B : Check Sum Register (SR)
|
|
*/
|
|
for (sum = 0, i = 0x04; i < 0x0c; i++)
|
|
sum += ed_asic_inb(sc, i);
|
|
if (sum != 0xff) {
|
|
if (bootverbose)
|
|
device_printf(dev, "Bad checksum %#x\n", sum);
|
|
return (ENXIO); /* invalid DL10019C */
|
|
}
|
|
if (bootverbose)
|
|
device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
|
|
for (i = 0; i < ETHER_ADDR_LEN; i++)
|
|
sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
|
|
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
|
|
id = ed_asic_inb(sc, 0xf);
|
|
sc->isa16bit = 1;
|
|
/*
|
|
* Hard code values based on the datasheet. We're NE-2000 compatible
|
|
* NIC with 24kb of packet memory starting at 24k offset. These
|
|
* cards also work with 16k at 16k, but don't work with 24k at 16k
|
|
* or 32k at 16k.
|
|
*/
|
|
sc->type = ED_TYPE_NE2000;
|
|
sc->mem_start = 24 * 1024;
|
|
memsize = sc->mem_size = 24 * 1024;
|
|
sc->mem_end = sc->mem_start + memsize;
|
|
sc->tx_page_start = memsize / ED_PAGE_SIZE;
|
|
sc->txb_cnt = 3;
|
|
sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
|
|
sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
|
|
|
|
sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
|
|
|
|
ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
|
|
ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
|
|
sc->vendor = ED_VENDOR_NOVELL;
|
|
sc->chip_type = (id & 0x90) == 0x90 ?
|
|
ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
|
|
sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
|
|
sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
|
|
sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
|
|
return (0);
|
|
}
|
|
|
|
/* MII bit-twiddling routines for cards using Dlink chipset */
|
|
#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
|
|
ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
|
|
#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
|
|
ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
|
|
|
|
static void
|
|
ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
|
|
{
|
|
if (sc->chip_type != ED_CHIP_TYPE_DL10022)
|
|
return;
|
|
|
|
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
|
|
DELAY(10);
|
|
ed_asic_outb(sc, ED_DL100XX_MIIBUS,
|
|
ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
|
|
DELAY(10);
|
|
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
|
|
DELAY(10);
|
|
ed_asic_outb(sc, ED_DL100XX_MIIBUS,
|
|
ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
|
|
DELAY(10);
|
|
ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
|
|
}
|
|
|
|
static void
|
|
ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
|
|
{
|
|
int i;
|
|
|
|
DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT);
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
if ((val >> i) & 1)
|
|
DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
|
|
else
|
|
DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
|
|
DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
|
|
DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
|
|
}
|
|
}
|
|
|
|
static u_int
|
|
ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
|
|
{
|
|
int i;
|
|
u_int val = 0;
|
|
|
|
DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT);
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
|
|
val <<= 1;
|
|
if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
|
|
val++;
|
|
DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
|
|
}
|
|
return val;
|
|
}
|
|
|
|
static void
|
|
ed_pccard_ax88x90_reset(struct ed_softc *sc)
|
|
{
|
|
int i;
|
|
|
|
/* Reset Card */
|
|
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
|
|
ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
|
|
|
|
/* Wait for the RST bit to assert, but cap it at 10ms */
|
|
for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
|
|
i--)
|
|
continue;
|
|
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */
|
|
if (i == 0)
|
|
device_printf(sc->dev, "Reset didn't finish\n");
|
|
}
|
|
|
|
/*
|
|
* Probe and vendor-specific initialization routine for ax88x90 boards
|
|
*/
|
|
static int
|
|
ed_probe_ax88x90_generic(device_t dev, int flags)
|
|
{
|
|
struct ed_softc *sc = device_get_softc(dev);
|
|
u_int memsize;
|
|
static char test_pattern[32] = "THIS is A memory TEST pattern";
|
|
char test_buffer[32];
|
|
|
|
ed_pccard_ax88x90_reset(sc);
|
|
DELAY(10*1000);
|
|
|
|
/* Make sure that we really have an 8390 based board */
|
|
if (!ed_probe_generic8390(sc))
|
|
return (ENXIO);
|
|
|
|
sc->vendor = ED_VENDOR_NOVELL;
|
|
sc->mem_shared = 0;
|
|
sc->cr_proto = ED_CR_RD2;
|
|
|
|
/*
|
|
* This prevents packets from being stored in the NIC memory when the
|
|
* readmem routine turns on the start bit in the CR. We write some
|
|
* bytes in word mode and verify we can read them back. If we can't
|
|
* then we don't have an AX88x90 chip here.
|
|
*/
|
|
sc->isa16bit = 1;
|
|
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
|
|
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
|
|
ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
|
|
ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
|
|
return (ENXIO);
|
|
|
|
/*
|
|
* Hard code values based on the datasheet. We're NE-2000 compatible
|
|
* NIC with 16kb of packet memory starting at 16k offset.
|
|
*/
|
|
sc->type = ED_TYPE_NE2000;
|
|
memsize = sc->mem_size = 16*1024;
|
|
sc->mem_start = 16 * 1024;
|
|
if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
|
|
sc->chip_type = ED_CHIP_TYPE_AX88790;
|
|
else {
|
|
sc->chip_type = ED_CHIP_TYPE_AX88190;
|
|
/*
|
|
* The AX88190 (not A) has external 64k SRAM. Probe for this
|
|
* here. Most of the cards I have either use the AX88190A
|
|
* part, or have only 32k SRAM for some reason, so I don't
|
|
* know if this works or not.
|
|
*/
|
|
ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern));
|
|
ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern));
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
|
|
sc->mem_start = 2*1024;
|
|
memsize = sc->mem_size = 62 * 1024;
|
|
}
|
|
}
|
|
sc->mem_end = sc->mem_start + memsize;
|
|
sc->tx_page_start = memsize / ED_PAGE_SIZE;
|
|
if (sc->mem_size > 16 * 1024)
|
|
sc->txb_cnt = 3;
|
|
else
|
|
sc->txb_cnt = 2;
|
|
sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
|
|
sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
|
|
|
|
sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
|
|
|
|
ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
|
|
ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
|
|
|
|
/* Get the mac before we go -- It's just at 0x400 in "SRAM" */
|
|
ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN);
|
|
|
|
/* clear any pending interrupts that might have occurred above */
|
|
ed_nic_outb(sc, ED_P0_ISR, 0xff);
|
|
sc->sc_write_mbufs = ed_pio_write_mbufs;
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
|
|
{
|
|
int i, id;
|
|
|
|
/*
|
|
* All AX88x90 devices have MII and a PHY, so we use this to weed out
|
|
* chips that would otherwise make it through the tests we have after
|
|
* this point.
|
|
*/
|
|
for (i = 0; i < 32; i++) {
|
|
id = ed_miibus_readreg(dev, i, MII_BMSR);
|
|
if (id != 0 && id != 0xffff)
|
|
break;
|
|
}
|
|
/*
|
|
* Found one, we're good.
|
|
*/
|
|
if (i != 32)
|
|
return (0);
|
|
/*
|
|
* Didn't find anything, so try to power up and try again. The PHY
|
|
* may be not responding because we're in power down mode.
|
|
*/
|
|
if (sc->chip_type == ED_CHIP_TYPE_AX88190)
|
|
return (ENXIO);
|
|
pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
|
|
for (i = 0; i < 32; i++) {
|
|
id = ed_miibus_readreg(dev, i, MII_BMSR);
|
|
if (id != 0 && id != 0xffff)
|
|
break;
|
|
}
|
|
/*
|
|
* Still no joy? We're AFU, punt.
|
|
*/
|
|
if (i == 32)
|
|
return (ENXIO);
|
|
return (0);
|
|
|
|
}
|
|
|
|
/*
|
|
* Special setup for AX88[17]90
|
|
*/
|
|
static int
|
|
ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
|
|
{
|
|
int error;
|
|
int iobase;
|
|
struct ed_softc *sc = device_get_softc(dev);
|
|
|
|
if (!(pp->flags & NE2000DVF_AX88X90))
|
|
return (ENXIO);
|
|
|
|
if (bootverbose)
|
|
device_printf(dev, "Checking AX88x90\n");
|
|
|
|
/*
|
|
* Set the IOBASE Register. The AX88x90 cards are potentially
|
|
* multifunction cards, and thus requires a slight workaround.
|
|
* We write the address the card is at, on the off chance that this
|
|
* card is not MFC.
|
|
* XXX I'm not sure that this is still needed...
|
|
*/
|
|
iobase = rman_get_start(sc->port_res);
|
|
pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
|
|
pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
|
|
|
|
sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
|
|
sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
|
|
error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
|
|
if (error) {
|
|
if (bootverbose)
|
|
device_printf(dev, "probe ax88x90 failed %d\n",
|
|
error);
|
|
goto fail;
|
|
}
|
|
error = ed_pccard_ax88x90_check_mii(dev, sc);
|
|
if (error)
|
|
goto fail;
|
|
sc->vendor = ED_VENDOR_NOVELL;
|
|
sc->type = ED_TYPE_NE2000;
|
|
if (sc->chip_type == ED_CHIP_TYPE_AX88190)
|
|
sc->type_str = "AX88190";
|
|
else
|
|
sc->type_str = "AX88790";
|
|
return (0);
|
|
fail:;
|
|
sc->mii_readbits = 0;
|
|
sc->mii_writebits = 0;
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
|
|
{
|
|
int i, data;
|
|
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
|
|
ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
|
|
ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
|
|
}
|
|
}
|
|
|
|
static u_int
|
|
ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
|
|
{
|
|
int i;
|
|
u_int val = 0;
|
|
uint8_t mdio;
|
|
|
|
mdio = ED_AX88X90_MII_DIRIN;
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
|
|
val <<= 1;
|
|
if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
|
|
val++;
|
|
ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
|
|
}
|
|
return val;
|
|
}
|
|
|
|
/*
|
|
* Special setup for TC5299J
|
|
*/
|
|
static int
|
|
ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
|
|
{
|
|
int error, i, id;
|
|
char *ts;
|
|
struct ed_softc *sc = device_get_softc(dev);
|
|
|
|
if (!(pp->flags & NE2000DVF_TC5299J))
|
|
return (ENXIO);
|
|
|
|
if (bootverbose)
|
|
device_printf(dev, "Checking Tc5299j\n");
|
|
|
|
error = ed_probe_Novell_generic(dev, device_get_flags(dev));
|
|
if (bootverbose)
|
|
device_printf(dev, "probe novel returns %d\n", error);
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
/*
|
|
* Check to see if we have a MII PHY ID at any address. All TC5299J
|
|
* devices have MII and a PHY, so we use this to weed out chips that
|
|
* would otherwise make it through the tests we have after this point.
|
|
*/
|
|
sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
|
|
sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
|
|
for (i = 0; i < 32; i++) {
|
|
id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
|
|
if (id != 0 && id != 0xffff)
|
|
break;
|
|
}
|
|
if (i == 32) {
|
|
sc->mii_readbits = 0;
|
|
sc->mii_writebits = 0;
|
|
return (ENXIO);
|
|
}
|
|
ts = "TC5299J";
|
|
if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
|
|
sc->mii_readbits = 0;
|
|
sc->mii_writebits = 0;
|
|
return (ENXIO);
|
|
}
|
|
sc->vendor = ED_VENDOR_NOVELL;
|
|
sc->type = ED_TYPE_NE2000;
|
|
sc->chip_type = ED_CHIP_TYPE_TC5299J;
|
|
sc->type_str = ts;
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
|
|
{
|
|
int i;
|
|
uint8_t cr, data;
|
|
|
|
/* Select page 3 */
|
|
cr = ed_nic_inb(sc, ED_P0_CR);
|
|
ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
|
|
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0;
|
|
ed_nic_outb(sc, ED_TC5299J_MIIBUS, data);
|
|
ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK);
|
|
}
|
|
ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0);
|
|
|
|
/* Restore prior page */
|
|
ed_nic_outb(sc, ED_P0_CR, cr);
|
|
}
|
|
|
|
static u_int
|
|
ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
|
|
{
|
|
int i;
|
|
u_int val = 0;
|
|
uint8_t cr;
|
|
|
|
/* Select page 3 */
|
|
cr = ed_nic_inb(sc, ED_P0_CR);
|
|
ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
|
|
|
|
ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
|
|
for (i = nbits - 1; i >= 0; i--) {
|
|
ed_nic_outb(sc, ED_TC5299J_MIIBUS,
|
|
ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT);
|
|
val <<= 1;
|
|
if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
|
|
val++;
|
|
ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
|
|
}
|
|
|
|
/* Restore prior page */
|
|
ed_nic_outb(sc, ED_P0_CR, cr);
|
|
return val;
|
|
}
|
|
|
|
/*
|
|
* MII bus support routines.
|
|
*/
|
|
static int
|
|
ed_miibus_readreg(device_t dev, int phy, int reg)
|
|
{
|
|
struct ed_softc *sc;
|
|
int failed, val;
|
|
|
|
sc = device_get_softc(dev);
|
|
/*
|
|
* The AX88790 has an interesting quirk. It has an internal phy that
|
|
* needs a special bit set to access, but can also have additional
|
|
* external PHYs set for things like HomeNET media. When accessing
|
|
* the internal PHY, a bit has to be set, when accessing the external
|
|
* PHYs, it must be clear. See Errata 1, page 51, in the AX88790
|
|
* datasheet for more details.
|
|
*
|
|
* Also, PHYs above 16 appear to be phantoms on some cards, but not
|
|
* others. Registers read for this are often the same as prior values
|
|
* read. Filter all register requests to 17-31.
|
|
*
|
|
* I can't explain it, since I don't have the DL100xx data sheets, but
|
|
* the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90
|
|
* chips have 14. The linux pcnet and axnet drivers confirm this.
|
|
*/
|
|
if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
|
|
if (phy > 0x10)
|
|
return (0);
|
|
if (phy == 0x10)
|
|
ed_asic_outb(sc, ED_AX88X90_GPIO,
|
|
ED_AX88X90_GPIO_INT_PHY);
|
|
else
|
|
ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
|
|
}
|
|
|
|
(*sc->mii_writebits)(sc, 0xffffffff, 32);
|
|
(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
|
|
(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
|
|
(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
|
|
(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
|
|
if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
|
|
sc->chip_type == ED_CHIP_TYPE_AX88190)
|
|
(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
|
|
failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
|
|
val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
|
|
(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
|
|
/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */
|
|
return (failed ? 0 : val);
|
|
}
|
|
|
|
static int
|
|
ed_miibus_writereg(device_t dev, int phy, int reg, int data)
|
|
{
|
|
struct ed_softc *sc;
|
|
|
|
/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */
|
|
sc = device_get_softc(dev);
|
|
/* See ed_miibus_readreg for details */
|
|
if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
|
|
if (phy > 0x10)
|
|
return (0);
|
|
if (phy == 0x10)
|
|
ed_asic_outb(sc, ED_AX88X90_GPIO,
|
|
ED_AX88X90_GPIO_INT_PHY);
|
|
else
|
|
ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
|
|
}
|
|
(*sc->mii_writebits)(sc, 0xffffffff, 32);
|
|
(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
|
|
(*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
|
|
(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
|
|
(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
|
|
(*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
|
|
(*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
|
|
(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
ed_ifmedia_upd(struct ifnet *ifp)
|
|
{
|
|
struct ed_softc *sc;
|
|
int error;
|
|
|
|
sc = ifp->if_softc;
|
|
if (sc->miibus == NULL)
|
|
return (ENXIO);
|
|
ED_LOCK(sc);
|
|
error = ed_pccard_kick_phy(sc);
|
|
ED_UNLOCK(sc);
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct ed_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = ifp->if_softc;
|
|
if (sc->miibus == NULL)
|
|
return;
|
|
|
|
mii = device_get_softc(sc->miibus);
|
|
mii_pollstat(mii);
|
|
ifmr->ifm_active = mii->mii_media_active;
|
|
ifmr->ifm_status = mii->mii_media_status;
|
|
}
|
|
|
|
static void
|
|
ed_child_detached(device_t dev, device_t child)
|
|
{
|
|
struct ed_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (child == sc->miibus)
|
|
sc->miibus = NULL;
|
|
}
|
|
|
|
static void
|
|
ed_pccard_tick(struct ed_softc *sc)
|
|
{
|
|
struct mii_data *mii;
|
|
int media = 0;
|
|
|
|
ED_ASSERT_LOCKED(sc);
|
|
if (sc->miibus != NULL) {
|
|
mii = device_get_softc(sc->miibus);
|
|
media = mii->mii_media_status;
|
|
mii_tick(mii);
|
|
if (mii->mii_media_status & IFM_ACTIVE &&
|
|
media != mii->mii_media_status) {
|
|
if (sc->chip_type == ED_CHIP_TYPE_DL10022) {
|
|
ed_asic_outb(sc, ED_DL10022_DIAG,
|
|
(mii->mii_media_active & IFM_FDX) ?
|
|
ED_DL10022_COLLISON_DIS : 0);
|
|
#ifdef notyet
|
|
} else if (sc->chip_type == ED_CHIP_TYPE_DL10019) {
|
|
write_asic(sc, ED_DL10019_MAGIC,
|
|
(mii->mii_media_active & IFM_FDX) ?
|
|
DL19FDUPLX : 0);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
static device_method_t ed_pccard_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, ed_pccard_probe),
|
|
DEVMETHOD(device_attach, ed_pccard_attach),
|
|
DEVMETHOD(device_detach, ed_detach),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_child_detached, ed_child_detached),
|
|
|
|
/* MII interface */
|
|
DEVMETHOD(miibus_readreg, ed_miibus_readreg),
|
|
DEVMETHOD(miibus_writereg, ed_miibus_writereg),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t ed_pccard_driver = {
|
|
"ed",
|
|
ed_pccard_methods,
|
|
sizeof(struct ed_softc)
|
|
};
|
|
|
|
DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
|
|
DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
|
|
MODULE_DEPEND(ed, miibus, 1, 1, 1);
|
|
MODULE_DEPEND(ed, ether, 1, 1, 1);
|