eb811915d2
30-bit like the reset of the controllers supported by this driver. Actually ALi M5451 can be setup up to generate 32-bit addresses by setting the 31st bit via the accompanying ISA bridge, which allows it to work in sparc64 machines whose IOMMU require at least 32-bit DMA. Even though other architectures would also benefit from 32-bit DMA, enabling this bit is limited to sparc64 as bus_dma(9) doesn't generally guarantee that a low address of BUS_SPACE_MAXADDR_32BIT results in a buffer in the 32-bit range. - According to Tatsuo YOKOGAWA's ali(4), the the DMA transfer size of ALi M5451 is fixed to 64k and in fact using the default size of 4k - The 4DWAVE DX and NX require the recording buffer to be 8-byte aligned so adjust the bus_dma_tag_create(9) accordingly. - Unlike the rest of the controllers supported by this driver, the ALi M5451 only has 32 hardware channels instead of 64 so limit the loop in tr_intr() accordingly. [1] Submitted by: yongari [1] Reviewed by: yongari (superset of what is committed) MFC after: 3 days
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