ce9f8963fd
WB (write-back) on x86 via control bits in PTEs and PDEs (including making use of the PAT MSR). Changes include: - A new pmap_mapdev_attr() function for amd64 and i386 which takes an additional parameter (relative to pmap_mapdev()) specifying the cache mode for this mapping. Note that on amd64 only WB mappings are done with the direct map, all other modes result in a private mapping. - pmap_mapdev() on i386 and amd64 now defaults to using UC (uncached) mappings rather than WB. Previously we relied on the BIOS setting up MTRR's to enforce memio regions being treated as UC. This might make hw.cbb_start_memory unnecessary in some cases now for example. - A new pmap_mapbios()/pmap_unmapbios() API has been added to allow places that used pmap_mapdev() to map non-device memory (such as ACPI tables) to do so using WB as before. - A new pmap_change_attr() function for amd64 and i386 that changes the caching mode for a range of KVA. Reviewed by: alc
783 lines
20 KiB
C
783 lines
20 KiB
C
/*-
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* Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <machine/apicreg.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/apicvar.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#include <contrib/dev/acpica/acpi.h>
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#include <contrib/dev/acpica/actables.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/pci/pcivar.h>
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#define NIOAPICS 32 /* Max number of I/O APICs */
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#define NLAPICS 32 /* Max number of local APICs */
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typedef void madt_entry_handler(APIC_HEADER *entry, void *arg);
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/* These two arrays are indexed by APIC IDs. */
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struct ioapic_info {
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void *io_apic;
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UINT32 io_vector;
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} ioapics[NIOAPICS];
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struct lapic_info {
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u_int la_enabled:1;
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u_int la_acpi_id:8;
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} lapics[NLAPICS];
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static int madt_found_sci_override;
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static MULTIPLE_APIC_TABLE *madt;
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static vm_paddr_t madt_physaddr;
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static vm_offset_t madt_length;
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MALLOC_DEFINE(M_MADT, "madt_table", "ACPI MADT Table Items");
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static enum intr_polarity interrupt_polarity(UINT16 Polarity, UINT8 Source);
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static enum intr_trigger interrupt_trigger(UINT16 TriggerMode, UINT8 Source);
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static int madt_find_cpu(u_int acpi_id, u_int *apic_id);
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static int madt_find_interrupt(int intr, void **apic, u_int *pin);
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static void *madt_map(vm_paddr_t pa, int offset, vm_offset_t length);
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static void *madt_map_table(vm_paddr_t pa, int offset, const char *sig);
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static void madt_parse_apics(APIC_HEADER *entry, void *arg);
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static void madt_parse_interrupt_override(MADT_INTERRUPT_OVERRIDE *intr);
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static void madt_parse_ints(APIC_HEADER *entry, void *arg __unused);
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static void madt_parse_local_nmi(MADT_LOCAL_APIC_NMI *nmi);
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static void madt_parse_nmi(MADT_NMI_SOURCE *nmi);
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static int madt_probe(void);
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static int madt_probe_cpus(void);
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static void madt_probe_cpus_handler(APIC_HEADER *entry, void *arg __unused);
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static int madt_probe_table(vm_paddr_t address);
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static void madt_register(void *dummy);
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static int madt_setup_local(void);
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static int madt_setup_io(void);
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static void madt_unmap(void *data, vm_offset_t length);
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static void madt_unmap_table(void *table);
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static void madt_walk_table(madt_entry_handler *handler, void *arg);
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static struct apic_enumerator madt_enumerator = {
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"MADT",
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madt_probe,
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madt_probe_cpus,
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madt_setup_local,
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madt_setup_io
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};
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/*
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* Code to abuse the crashdump map to map in the tables for the early
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* probe. We cheat and make the following assumptions about how we
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* use this KVA: page 0 is used to map in the first page of each table
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* found via the RSDT or XSDT and pages 1 to n are used to map in the
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* RSDT or XSDT. The offset is in pages; the length is in bytes.
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*/
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static void *
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madt_map(vm_paddr_t pa, int offset, vm_offset_t length)
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{
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vm_offset_t va, off;
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void *data;
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off = pa & PAGE_MASK;
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length = roundup(length + off, PAGE_SIZE);
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pa = pa & PG_FRAME;
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va = (vm_offset_t)pmap_kenter_temporary(pa, offset) +
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(offset * PAGE_SIZE);
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data = (void *)(va + off);
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length -= PAGE_SIZE;
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while (length > 0) {
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va += PAGE_SIZE;
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pa += PAGE_SIZE;
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length -= PAGE_SIZE;
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pmap_kenter(va, pa);
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invlpg(va);
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}
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return (data);
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}
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static void
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madt_unmap(void *data, vm_offset_t length)
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{
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vm_offset_t va, off;
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va = (vm_offset_t)data;
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off = va & PAGE_MASK;
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length = roundup(length + off, PAGE_SIZE);
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va &= ~PAGE_MASK;
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while (length > 0) {
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pmap_kremove(va);
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invlpg(va);
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va += PAGE_SIZE;
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length -= PAGE_SIZE;
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}
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}
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static void *
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madt_map_table(vm_paddr_t pa, int offset, const char *sig)
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{
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ACPI_TABLE_HEADER *header;
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vm_offset_t length;
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void *table;
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header = madt_map(pa, offset, sizeof(ACPI_TABLE_HEADER));
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if (strncmp(header->Signature, sig, 4) != 0) {
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madt_unmap(header, sizeof(ACPI_TABLE_HEADER));
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return (NULL);
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}
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length = header->Length;
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madt_unmap(header, sizeof(ACPI_TABLE_HEADER));
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table = madt_map(pa, offset, length);
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if (ACPI_FAILURE(AcpiTbVerifyTableChecksum(table))) {
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if (bootverbose)
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printf("MADT: Failed checksum for table %s\n", sig);
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madt_unmap(table, length);
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return (NULL);
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}
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return (table);
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}
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static void
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madt_unmap_table(void *table)
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{
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ACPI_TABLE_HEADER *header;
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header = (ACPI_TABLE_HEADER *)table;
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madt_unmap(table, header->Length);
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}
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/*
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* Look for an ACPI Multiple APIC Description Table ("APIC")
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*/
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static int
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madt_probe(void)
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{
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ACPI_POINTER rsdp_ptr;
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RSDP_DESCRIPTOR *rsdp;
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RSDT_DESCRIPTOR *rsdt;
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XSDT_DESCRIPTOR *xsdt;
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int i, count;
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if (resource_disabled("acpi", 0))
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return (ENXIO);
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/*
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* Map in the RSDP. Since ACPI uses AcpiOsMapMemory() which in turn
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* calls pmap_mapbios() to find the RSDP, we assume that we can use
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* pmap_mapbios() to map the RSDP.
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*/
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if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
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return (ENXIO);
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#ifdef __i386__
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KASSERT(rsdp_ptr.Pointer.Physical < KERNLOAD, ("RSDP too high"));
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#endif
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rsdp = pmap_mapbios(rsdp_ptr.Pointer.Physical, sizeof(RSDP_DESCRIPTOR));
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if (rsdp == NULL) {
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if (bootverbose)
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printf("MADT: Failed to map RSDP\n");
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return (ENXIO);
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}
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/*
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* For ACPI >= 2.0, use the XSDT if it is available.
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* Otherwise, use the RSDT. We map the XSDT or RSDT at page 1
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* in the crashdump area. Page 0 is used to map in the
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* headers of candidate ACPI tables.
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*/
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if (rsdp->Revision >= 2 && rsdp->XsdtPhysicalAddress != 0) {
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/*
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* AcpiOsGetRootPointer only verifies the checksum for
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* the version 1.0 portion of the RSDP. Version 2.0 has
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* an additional checksum that we verify first.
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*/
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if (AcpiTbGenerateChecksum(rsdp, ACPI_RSDP_XCHECKSUM_LENGTH)) {
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if (bootverbose)
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printf("MADT: RSDP failed extended checksum\n");
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return (ENXIO);
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}
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xsdt = madt_map_table(rsdp->XsdtPhysicalAddress, 1, XSDT_SIG);
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if (xsdt == NULL) {
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if (bootverbose)
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printf("MADT: Failed to map XSDT\n");
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return (ENXIO);
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}
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count = (xsdt->Length - sizeof(ACPI_TABLE_HEADER)) /
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sizeof(UINT64);
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for (i = 0; i < count; i++)
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if (madt_probe_table(xsdt->TableOffsetEntry[i]))
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break;
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madt_unmap_table(xsdt);
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} else {
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rsdt = madt_map_table(rsdp->RsdtPhysicalAddress, 1, RSDT_SIG);
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if (rsdt == NULL) {
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if (bootverbose)
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printf("MADT: Failed to map RSDT\n");
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return (ENXIO);
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}
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count = (rsdt->Length - sizeof(ACPI_TABLE_HEADER)) /
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sizeof(UINT32);
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for (i = 0; i < count; i++)
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if (madt_probe_table(rsdt->TableOffsetEntry[i]))
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break;
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madt_unmap_table(rsdt);
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}
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pmap_unmapbios((vm_offset_t)rsdp, sizeof(RSDP_DESCRIPTOR));
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if (madt_physaddr == 0) {
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if (bootverbose)
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printf("MADT: No MADT table found\n");
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return (ENXIO);
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}
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if (bootverbose)
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printf("MADT: Found table at 0x%jx\n",
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(uintmax_t)madt_physaddr);
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/*
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* Verify that we can map the full table and that its checksum is
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* correct, etc.
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*/
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madt = madt_map_table(madt_physaddr, 0, APIC_SIG);
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if (madt == NULL)
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return (ENXIO);
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madt_unmap_table(madt);
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madt = NULL;
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return (0);
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}
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/*
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* See if a given ACPI table is the MADT.
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*/
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static int
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madt_probe_table(vm_paddr_t address)
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{
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ACPI_TABLE_HEADER *table;
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table = madt_map(address, 0, sizeof(ACPI_TABLE_HEADER));
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if (table == NULL) {
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if (bootverbose)
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printf("MADT: Failed to map table at 0x%jx\n",
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(uintmax_t)address);
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return (0);
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}
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if (bootverbose)
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printf("Table '%.4s' at 0x%jx\n", table->Signature,
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(uintmax_t)address);
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if (strncmp(table->Signature, APIC_SIG, 4) != 0) {
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madt_unmap(table, sizeof(ACPI_TABLE_HEADER));
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return (0);
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}
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madt_physaddr = address;
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madt_length = table->Length;
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madt_unmap(table, sizeof(ACPI_TABLE_HEADER));
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return (1);
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}
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/*
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* Run through the MP table enumerating CPUs.
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*/
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static int
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madt_probe_cpus(void)
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{
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madt = madt_map_table(madt_physaddr, 0, APIC_SIG);
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KASSERT(madt != NULL, ("Unable to re-map MADT"));
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madt_walk_table(madt_probe_cpus_handler, NULL);
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madt_unmap_table(madt);
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madt = NULL;
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return (0);
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}
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/*
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* Initialize the local APIC on the BSP.
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*/
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static int
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madt_setup_local(void)
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{
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madt = pmap_mapbios(madt_physaddr, madt_length);
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lapic_init((uintptr_t)madt->LocalApicAddress);
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printf("ACPI APIC Table: <%.*s %.*s>\n",
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(int)sizeof(madt->OemId), madt->OemId,
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(int)sizeof(madt->OemTableId), madt->OemTableId);
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/*
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* We ignore 64-bit local APIC override entries. Should we
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* perhaps emit a warning here if we find one?
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*/
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return (0);
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}
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/*
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* Enumerate I/O APICs and setup interrupt sources.
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*/
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static int
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madt_setup_io(void)
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{
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void *ioapic;
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u_int pin;
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int i;
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/* Try to initialize ACPI so that we can access the FADT. */
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i = acpi_Startup();
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if (ACPI_FAILURE(i)) {
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printf("MADT: ACPI Startup failed with %s\n",
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AcpiFormatException(i));
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printf("Try disabling either ACPI or apic support.\n");
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panic("Using MADT but ACPI doesn't work");
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}
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/* First, we run through adding I/O APIC's. */
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madt_walk_table(madt_parse_apics, NULL);
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/* Second, we run through the table tweaking interrupt sources. */
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madt_walk_table(madt_parse_ints, NULL);
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/*
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* If there was not an explicit override entry for the SCI,
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* force it to use level trigger and active-low polarity.
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*/
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if (!madt_found_sci_override) {
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if (madt_find_interrupt(AcpiGbl_FADT->SciInt, &ioapic, &pin)
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!= 0)
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printf("MADT: Could not find APIC for SCI IRQ %d\n",
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AcpiGbl_FADT->SciInt);
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else {
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printf(
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"MADT: Forcing active-low polarity and level trigger for SCI\n");
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ioapic_set_polarity(ioapic, pin, INTR_POLARITY_LOW);
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ioapic_set_triggermode(ioapic, pin, INTR_TRIGGER_LEVEL);
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}
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}
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/* Third, we register all the I/O APIC's. */
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for (i = 0; i < NIOAPICS; i++)
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if (ioapics[i].io_apic != NULL)
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ioapic_register(ioapics[i].io_apic);
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/* Finally, we throw the switch to enable the I/O APIC's. */
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acpi_SetDefaultIntrModel(ACPI_INTR_APIC);
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return (0);
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}
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static void
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madt_register(void *dummy __unused)
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{
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apic_register_enumerator(&madt_enumerator);
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}
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SYSINIT(madt_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST,
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madt_register, NULL)
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/*
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* Call the handler routine for each entry in the MADT table.
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*/
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static void
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madt_walk_table(madt_entry_handler *handler, void *arg)
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{
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APIC_HEADER *entry;
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u_char *p, *end;
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end = (u_char *)(madt) + madt->Length;
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for (p = (u_char *)(madt + 1); p < end; ) {
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entry = (APIC_HEADER *)p;
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handler(entry, arg);
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p += entry->Length;
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}
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}
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static void
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madt_probe_cpus_handler(APIC_HEADER *entry, void *arg)
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{
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MADT_PROCESSOR_APIC *proc;
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struct lapic_info *la;
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switch (entry->Type) {
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case APIC_PROCESSOR:
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/*
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* The MADT does not include a BSP flag, so we have to
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* let the MP code figure out which CPU is the BSP on
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* its own.
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*/
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proc = (MADT_PROCESSOR_APIC *)entry;
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if (bootverbose)
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printf("MADT: Found CPU APIC ID %d ACPI ID %d: %s\n",
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proc->LocalApicId, proc->ProcessorId,
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proc->ProcessorEnabled ? "enabled" : "disabled");
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if (!proc->ProcessorEnabled)
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break;
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if (proc->LocalApicId >= NLAPICS)
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panic("%s: CPU ID %d too high", __func__,
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proc->LocalApicId);
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la = &lapics[proc->LocalApicId];
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KASSERT(la->la_enabled == 0,
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("Duplicate local APIC ID %d", proc->LocalApicId));
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la->la_enabled = 1;
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la->la_acpi_id = proc->ProcessorId;
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lapic_create(proc->LocalApicId, 0);
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break;
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}
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}
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/*
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* Add an I/O APIC from an entry in the table.
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*/
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static void
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madt_parse_apics(APIC_HEADER *entry, void *arg __unused)
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{
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MADT_IO_APIC *apic;
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switch (entry->Type) {
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|
case APIC_IO:
|
|
apic = (MADT_IO_APIC *)entry;
|
|
if (bootverbose)
|
|
printf("MADT: Found IO APIC ID %d, Interrupt %d at %p\n",
|
|
apic->IoApicId, apic->Interrupt,
|
|
(void *)(uintptr_t)apic->Address);
|
|
if (apic->IoApicId >= NIOAPICS)
|
|
panic("%s: I/O APIC ID %d too high", __func__,
|
|
apic->IoApicId);
|
|
if (ioapics[apic->IoApicId].io_apic != NULL)
|
|
panic("%s: Double APIC ID %d", __func__,
|
|
apic->IoApicId);
|
|
ioapics[apic->IoApicId].io_apic = ioapic_create(
|
|
(uintptr_t)apic->Address, apic->IoApicId,
|
|
apic->Interrupt);
|
|
ioapics[apic->IoApicId].io_vector = apic->Interrupt;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Determine properties of an interrupt source. Note that for ACPI these
|
|
* functions are only used for ISA interrupts, so we assume ISA bus values
|
|
* (Active Hi, Edge Triggered) for conforming values except for the ACPI
|
|
* SCI for which we use Active Lo, Level Triggered.
|
|
*/
|
|
static enum intr_polarity
|
|
interrupt_polarity(UINT16 Polarity, UINT8 Source)
|
|
{
|
|
|
|
switch (Polarity) {
|
|
case POLARITY_CONFORMS:
|
|
if (Source == AcpiGbl_FADT->SciInt)
|
|
return (INTR_POLARITY_LOW);
|
|
else
|
|
return (INTR_POLARITY_HIGH);
|
|
case POLARITY_ACTIVE_HIGH:
|
|
return (INTR_POLARITY_HIGH);
|
|
case POLARITY_ACTIVE_LOW:
|
|
return (INTR_POLARITY_LOW);
|
|
default:
|
|
panic("Bogus Interrupt Polarity");
|
|
}
|
|
}
|
|
|
|
static enum intr_trigger
|
|
interrupt_trigger(UINT16 TriggerMode, UINT8 Source)
|
|
{
|
|
|
|
switch (TriggerMode) {
|
|
case TRIGGER_CONFORMS:
|
|
if (Source == AcpiGbl_FADT->SciInt)
|
|
return (INTR_TRIGGER_LEVEL);
|
|
else
|
|
return (INTR_TRIGGER_EDGE);
|
|
case TRIGGER_EDGE:
|
|
return (INTR_TRIGGER_EDGE);
|
|
case TRIGGER_LEVEL:
|
|
return (INTR_TRIGGER_LEVEL);
|
|
default:
|
|
panic("Bogus Interrupt Trigger Mode");
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Find the local APIC ID associated with a given ACPI Processor ID.
|
|
*/
|
|
static int
|
|
madt_find_cpu(u_int acpi_id, u_int *apic_id)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < NLAPICS; i++) {
|
|
if (!lapics[i].la_enabled)
|
|
continue;
|
|
if (lapics[i].la_acpi_id != acpi_id)
|
|
continue;
|
|
*apic_id = i;
|
|
return (0);
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
/*
|
|
* Find the IO APIC and pin on that APIC associated with a given global
|
|
* interrupt.
|
|
*/
|
|
static int
|
|
madt_find_interrupt(int intr, void **apic, u_int *pin)
|
|
{
|
|
int i, best;
|
|
|
|
best = -1;
|
|
for (i = 0; i < NIOAPICS; i++) {
|
|
if (ioapics[i].io_apic == NULL ||
|
|
ioapics[i].io_vector > intr)
|
|
continue;
|
|
if (best == -1 ||
|
|
ioapics[best].io_vector < ioapics[i].io_vector)
|
|
best = i;
|
|
}
|
|
if (best == -1)
|
|
return (ENOENT);
|
|
*apic = ioapics[best].io_apic;
|
|
*pin = intr - ioapics[best].io_vector;
|
|
if (*pin > 32)
|
|
printf("WARNING: Found intpin of %u for vector %d\n", *pin,
|
|
intr);
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Parse an interrupt source override for an ISA interrupt.
|
|
*/
|
|
static void
|
|
madt_parse_interrupt_override(MADT_INTERRUPT_OVERRIDE *intr)
|
|
{
|
|
void *new_ioapic, *old_ioapic;
|
|
u_int new_pin, old_pin;
|
|
enum intr_trigger trig;
|
|
enum intr_polarity pol;
|
|
char buf[64];
|
|
|
|
if (acpi_quirks & ACPI_Q_MADT_IRQ0 && intr->Source == 0 &&
|
|
intr->Interrupt == 2) {
|
|
if (bootverbose)
|
|
printf("MADT: Skipping timer override\n");
|
|
return;
|
|
}
|
|
if (bootverbose)
|
|
printf("MADT: Interrupt override: source %u, irq %u\n",
|
|
intr->Source, intr->Interrupt);
|
|
KASSERT(intr->Bus == 0, ("bus for interrupt overrides must be zero"));
|
|
if (madt_find_interrupt(intr->Interrupt, &new_ioapic,
|
|
&new_pin) != 0) {
|
|
printf("MADT: Could not find APIC for vector %d (IRQ %d)\n",
|
|
intr->Interrupt, intr->Source);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Lookup the appropriate trigger and polarity modes for this
|
|
* entry.
|
|
*/
|
|
trig = interrupt_trigger(intr->TriggerMode, intr->Source);
|
|
pol = interrupt_polarity(intr->Polarity, intr->Source);
|
|
|
|
/*
|
|
* If the SCI is identity mapped but has edge trigger and
|
|
* active-hi polarity or the force_sci_lo tunable is set,
|
|
* force it to use level/lo.
|
|
*/
|
|
if (intr->Source == AcpiGbl_FADT->SciInt) {
|
|
madt_found_sci_override = 1;
|
|
if (getenv_string("hw.acpi.sci.trigger", buf, sizeof(buf))) {
|
|
if (tolower(buf[0]) == 'e')
|
|
trig = INTR_TRIGGER_EDGE;
|
|
else if (tolower(buf[0]) == 'l')
|
|
trig = INTR_TRIGGER_LEVEL;
|
|
else
|
|
panic(
|
|
"Invalid trigger %s: must be 'edge' or 'level'",
|
|
buf);
|
|
printf("MADT: Forcing SCI to %s trigger\n",
|
|
trig == INTR_TRIGGER_EDGE ? "edge" : "level");
|
|
}
|
|
if (getenv_string("hw.acpi.sci.polarity", buf, sizeof(buf))) {
|
|
if (tolower(buf[0]) == 'h')
|
|
pol = INTR_POLARITY_HIGH;
|
|
else if (tolower(buf[0]) == 'l')
|
|
pol = INTR_POLARITY_LOW;
|
|
else
|
|
panic(
|
|
"Invalid polarity %s: must be 'high' or 'low'",
|
|
buf);
|
|
printf("MADT: Forcing SCI to active %s polarity\n",
|
|
pol == INTR_POLARITY_HIGH ? "high" : "low");
|
|
}
|
|
}
|
|
|
|
/* Remap the IRQ if it is mapped to a different interrupt vector. */
|
|
if (intr->Source != intr->Interrupt) {
|
|
/*
|
|
* If the SCI is remapped to a non-ISA global interrupt,
|
|
* then override the vector we use to setup and allocate
|
|
* the interrupt.
|
|
*/
|
|
if (intr->Interrupt > 15 &&
|
|
intr->Source == AcpiGbl_FADT->SciInt)
|
|
acpi_OverrideInterruptLevel(intr->Interrupt);
|
|
else
|
|
ioapic_remap_vector(new_ioapic, new_pin, intr->Source);
|
|
if (madt_find_interrupt(intr->Source, &old_ioapic,
|
|
&old_pin) != 0)
|
|
printf("MADT: Could not find APIC for source IRQ %d\n",
|
|
intr->Source);
|
|
else if (ioapic_get_vector(old_ioapic, old_pin) ==
|
|
intr->Source)
|
|
ioapic_disable_pin(old_ioapic, old_pin);
|
|
}
|
|
|
|
/* Program the polarity and trigger mode. */
|
|
ioapic_set_triggermode(new_ioapic, new_pin, trig);
|
|
ioapic_set_polarity(new_ioapic, new_pin, pol);
|
|
}
|
|
|
|
/*
|
|
* Parse an entry for an NMI routed to an IO APIC.
|
|
*/
|
|
static void
|
|
madt_parse_nmi(MADT_NMI_SOURCE *nmi)
|
|
{
|
|
void *ioapic;
|
|
u_int pin;
|
|
|
|
if (madt_find_interrupt(nmi->Interrupt, &ioapic, &pin) != 0) {
|
|
printf("MADT: Could not find APIC for vector %d\n",
|
|
nmi->Interrupt);
|
|
return;
|
|
}
|
|
|
|
ioapic_set_nmi(ioapic, pin);
|
|
if (nmi->TriggerMode != TRIGGER_CONFORMS)
|
|
ioapic_set_triggermode(ioapic, pin,
|
|
interrupt_trigger(nmi->TriggerMode, 0));
|
|
if (nmi->Polarity != TRIGGER_CONFORMS)
|
|
ioapic_set_polarity(ioapic, pin,
|
|
interrupt_polarity(nmi->Polarity, 0));
|
|
}
|
|
|
|
/*
|
|
* Parse an entry for an NMI routed to a local APIC LVT pin.
|
|
*/
|
|
static void
|
|
madt_parse_local_nmi(MADT_LOCAL_APIC_NMI *nmi)
|
|
{
|
|
u_int apic_id, pin;
|
|
|
|
if (nmi->ProcessorId == 0xff)
|
|
apic_id = APIC_ID_ALL;
|
|
else if (madt_find_cpu(nmi->ProcessorId, &apic_id) != 0) {
|
|
if (bootverbose)
|
|
printf("MADT: Ignoring local NMI routed to ACPI CPU %u\n",
|
|
nmi->ProcessorId);
|
|
return;
|
|
}
|
|
if (nmi->Lint == 0)
|
|
pin = LVT_LINT0;
|
|
else
|
|
pin = LVT_LINT1;
|
|
lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
|
|
if (nmi->TriggerMode != TRIGGER_CONFORMS)
|
|
lapic_set_lvt_triggermode(apic_id, pin,
|
|
interrupt_trigger(nmi->TriggerMode, 0));
|
|
if (nmi->Polarity != POLARITY_CONFORMS)
|
|
lapic_set_lvt_polarity(apic_id, pin,
|
|
interrupt_polarity(nmi->Polarity, 0));
|
|
}
|
|
|
|
/*
|
|
* Parse interrupt entries.
|
|
*/
|
|
static void
|
|
madt_parse_ints(APIC_HEADER *entry, void *arg __unused)
|
|
{
|
|
|
|
switch (entry->Type) {
|
|
case APIC_XRUPT_OVERRIDE:
|
|
madt_parse_interrupt_override(
|
|
(MADT_INTERRUPT_OVERRIDE *)entry);
|
|
break;
|
|
case APIC_NMI:
|
|
madt_parse_nmi((MADT_NMI_SOURCE *)entry);
|
|
break;
|
|
case APIC_LOCAL_NMI:
|
|
madt_parse_local_nmi((MADT_LOCAL_APIC_NMI *)entry);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Setup per-CPU ACPI IDs.
|
|
*/
|
|
static void
|
|
madt_set_ids(void *dummy)
|
|
{
|
|
struct lapic_info *la;
|
|
struct pcpu *pc;
|
|
u_int i;
|
|
|
|
if (madt == NULL)
|
|
return;
|
|
for (i = 0; i < MAXCPU; i++) {
|
|
if (CPU_ABSENT(i))
|
|
continue;
|
|
pc = pcpu_find(i);
|
|
KASSERT(pc != NULL, ("no pcpu data for CPU %d", i));
|
|
la = &lapics[pc->pc_apic_id];
|
|
if (!la->la_enabled)
|
|
panic("APIC: CPU with APIC ID %u is not enabled",
|
|
pc->pc_apic_id);
|
|
pc->pc_acpi_id = la->la_acpi_id;
|
|
if (bootverbose)
|
|
printf("APIC: CPU %u has ACPI ID %u\n", i,
|
|
la->la_acpi_id);
|
|
}
|
|
}
|
|
SYSINIT(madt_set_ids, SI_SUB_CPU, SI_ORDER_ANY, madt_set_ids, NULL)
|