2dd1bdf183
Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
452 lines
12 KiB
C
452 lines
12 KiB
C
/*-
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* Copyright (c) 2005, M. Warner Losh
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* All rights reserved.
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ed.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sockio.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_mib.h>
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#include <net/if_media.h>
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#include <net/bpf.h>
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#include <dev/ed/if_edreg.h>
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#include <dev/ed/if_edvar.h>
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/*
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* Interrupt conversion table for WD/SMC ASIC/83C584
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*/
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static uint16_t ed_intr_val[] = {
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9,
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3,
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5,
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7,
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10,
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11,
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15,
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4
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};
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/*
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* Interrupt conversion table for 83C790
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*/
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static uint16_t ed_790_intr_val[] = {
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0,
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9,
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3,
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5,
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7,
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10,
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11,
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15
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};
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/*
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* Probe and vendor-specific initialization routine for SMC/WD80x3 boards
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*/
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int
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ed_probe_WD80x3_generic(device_t dev, int flags, uint16_t *intr_vals[])
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{
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struct ed_softc *sc = device_get_softc(dev);
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int error;
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int i;
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u_int memsize;
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u_char iptr, isa16bit, sum, totalsum;
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rman_res_t irq, junk, pmem;
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sc->chip_type = ED_CHIP_TYPE_DP8390;
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if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER) {
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totalsum = ED_WD_ROM_CHECKSUM_TOTAL_TOSH_ETHER;
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ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_POW);
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DELAY(10000);
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}
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else
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totalsum = ED_WD_ROM_CHECKSUM_TOTAL;
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/*
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* Attempt to do a checksum over the station address PROM. If it
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* fails, it's probably not a SMC/WD board. There is a problem with
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* this, though: some clone WD boards don't pass the checksum test.
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* Danpex boards for one.
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*/
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for (sum = 0, i = 0; i < 8; ++i)
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sum += ed_asic_inb(sc, ED_WD_PROM + i);
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if (sum != totalsum) {
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/*
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* Checksum is invalid. This often happens with cheap WD8003E
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* clones. In this case, the checksum byte (the eighth byte)
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* seems to always be zero.
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*/
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if (ed_asic_inb(sc, ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
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ed_asic_inb(sc, ED_WD_PROM + 7) != 0)
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return (ENXIO);
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}
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/* reset card to force it into a known state. */
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if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER)
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ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
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else
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ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_RST);
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DELAY(100);
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ed_asic_outb(sc, ED_WD_MSR, ed_asic_inb(sc, ED_WD_MSR) & ~ED_WD_MSR_RST);
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/* wait in the case this card is reading its EEROM */
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DELAY(5000);
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sc->vendor = ED_VENDOR_WD_SMC;
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sc->type = ed_asic_inb(sc, ED_WD_CARD_ID);
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/*
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* Set initial values for width/size.
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*/
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memsize = 8192;
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isa16bit = 0;
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switch (sc->type) {
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case ED_TYPE_WD8003S:
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sc->type_str = "WD8003S";
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break;
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case ED_TYPE_WD8003E:
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sc->type_str = "WD8003E";
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break;
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case ED_TYPE_WD8003EB:
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sc->type_str = "WD8003EB";
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break;
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case ED_TYPE_WD8003W:
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sc->type_str = "WD8003W";
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break;
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case ED_TYPE_WD8013EBT:
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sc->type_str = "WD8013EBT";
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memsize = 16384;
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isa16bit = 1;
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break;
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case ED_TYPE_WD8013W:
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sc->type_str = "WD8013W";
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memsize = 16384;
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isa16bit = 1;
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break;
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case ED_TYPE_WD8013EP: /* also WD8003EP */
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if (ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_16BIT) {
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isa16bit = 1;
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memsize = 16384;
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sc->type_str = "WD8013EP";
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} else
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sc->type_str = "WD8003EP";
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break;
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case ED_TYPE_WD8013WC:
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sc->type_str = "WD8013WC";
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memsize = 16384;
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isa16bit = 1;
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break;
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case ED_TYPE_WD8013EBP:
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sc->type_str = "WD8013EBP";
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memsize = 16384;
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isa16bit = 1;
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break;
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case ED_TYPE_WD8013EPC:
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sc->type_str = "WD8013EPC";
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memsize = 16384;
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isa16bit = 1;
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break;
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case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
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case ED_TYPE_SMC8216T:
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if (sc->type == ED_TYPE_SMC8216C)
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sc->type_str = "SMC8216/SMC8216C";
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else
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sc->type_str = "SMC8216T";
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ed_asic_outb(sc, ED_WD790_HWR,
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ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH);
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switch (ed_asic_inb(sc, ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
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case ED_WD790_RAR_SZ64:
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memsize = 65536;
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break;
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case ED_WD790_RAR_SZ32:
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memsize = 32768;
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break;
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case ED_WD790_RAR_SZ16:
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memsize = 16384;
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break;
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case ED_WD790_RAR_SZ8:
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/* 8216 has 16K shared mem -- 8416 has 8K */
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if (sc->type == ED_TYPE_SMC8216C)
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sc->type_str = "SMC8416C/SMC8416BT";
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else
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sc->type_str = "SMC8416T";
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memsize = 8192;
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break;
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}
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ed_asic_outb(sc, ED_WD790_HWR,
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ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
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isa16bit = 1;
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sc->chip_type = ED_CHIP_TYPE_WD790;
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break;
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case ED_TYPE_TOSHIBA1:
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sc->type_str = "Toshiba1";
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memsize = 32768;
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isa16bit = 1;
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break;
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case ED_TYPE_TOSHIBA4:
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sc->type_str = "Toshiba4";
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memsize = 32768;
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isa16bit = 1;
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break;
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default:
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sc->type_str = "";
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break;
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}
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/*
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* Make some adjustments to initial values depending on what is found
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* in the ICR.
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*/
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if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
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&& (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
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&& ((ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
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isa16bit = 0;
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memsize = 8192;
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}
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/* Override memsize? XXX */
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error = ed_alloc_memory(dev, 0, memsize);
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if (error)
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return (error);
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sc->mem_start = 0;
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#ifdef ED_DEBUG
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printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%lu\n",
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sc->type, sc->type_str, isa16bit, memsize,
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rman_get_size(sc->mem_res));
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for (i = 0; i < 8; i++)
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printf("%x -> %x\n", i, ed_asic_inb(sc, i));
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#endif
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pmem = rman_get_start(sc->mem_res);
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if (!(flags & ED_FLAGS_PCCARD)) {
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error = ed_isa_mem_ok(dev, pmem, memsize);
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if (error)
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return (error);
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}
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/*
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* (note that if the user specifies both of the following flags that
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* '8bit' mode intentionally has precedence)
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*/
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if (flags & ED_FLAGS_FORCE_16BIT_MODE)
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isa16bit = 1;
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if (flags & ED_FLAGS_FORCE_8BIT_MODE)
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isa16bit = 0;
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/*
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* If possible, get the assigned interrupt number from the card and
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* use it.
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*/
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if ((sc->type & ED_WD_SOFTCONFIG) &&
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(sc->chip_type != ED_CHIP_TYPE_WD790)) {
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/*
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* Assemble together the encoded interrupt number.
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*/
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iptr = (ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_IR2) |
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((ed_asic_inb(sc, ED_WD_IRR) &
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(ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
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/*
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* If no interrupt specified (or "?"), use what the board tells us.
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*/
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error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
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if (error && intr_vals[0] != NULL)
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error = bus_set_resource(dev, SYS_RES_IRQ, 0,
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intr_vals[0][iptr], 1);
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if (error)
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return (error);
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/*
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* Enable the interrupt.
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*/
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ed_asic_outb(sc, ED_WD_IRR,
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ed_asic_inb(sc, ED_WD_IRR) | ED_WD_IRR_IEN);
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}
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if (sc->chip_type == ED_CHIP_TYPE_WD790) {
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ed_asic_outb(sc, ED_WD790_HWR,
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ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH);
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iptr = (((ed_asic_inb(sc, ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
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(ed_asic_inb(sc, ED_WD790_GCR) &
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(ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
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ed_asic_outb(sc, ED_WD790_HWR,
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ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
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/*
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* If no interrupt specified (or "?"), use what the board tells us.
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*/
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error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
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if (error && intr_vals[1] != NULL)
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error = bus_set_resource(dev, SYS_RES_IRQ, 0,
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intr_vals[1][iptr], 1);
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if (error)
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return (error);
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/*
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* Enable interrupts.
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*/
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ed_asic_outb(sc, ED_WD790_ICR,
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ed_asic_inb(sc, ED_WD790_ICR) | ED_WD790_ICR_EIL);
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}
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error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
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if (error) {
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device_printf(dev, "%s cards don't support auto-detected/assigned interrupts.\n",
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sc->type_str);
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return (ENXIO);
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}
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sc->isa16bit = isa16bit;
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sc->mem_shared = 1;
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/*
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* allocate one xmit buffer if < 16k, two buffers otherwise
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*/
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if (memsize < 16384 || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
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sc->txb_cnt = 1;
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else
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sc->txb_cnt = 2;
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sc->tx_page_start = ED_WD_PAGE_OFFSET;
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sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
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sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
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sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
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sc->mem_size = memsize;
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sc->mem_end = sc->mem_start + memsize;
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/*
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* Get station address from on-board ROM
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*/
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for (i = 0; i < ETHER_ADDR_LEN; ++i)
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sc->enaddr[i] = ed_asic_inb(sc, ED_WD_PROM + i);
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/*
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* Set upper address bits and 8/16 bit access to shared memory.
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*/
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if (isa16bit) {
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if (sc->chip_type == ED_CHIP_TYPE_WD790)
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sc->wd_laar_proto = ed_asic_inb(sc, ED_WD_LAAR);
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else
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sc->wd_laar_proto = ED_WD_LAAR_L16EN |
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((pmem >> 19) & ED_WD_LAAR_ADDRHI);
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/*
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* Enable 16bit access
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*/
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ed_asic_outb(sc, ED_WD_LAAR, sc->wd_laar_proto |
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ED_WD_LAAR_M16EN);
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} else {
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if (((sc->type & ED_WD_SOFTCONFIG) ||
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(sc->type == ED_TYPE_TOSHIBA1) ||
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(sc->type == ED_TYPE_TOSHIBA4) ||
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(sc->type == ED_TYPE_WD8013EBT)) &&
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(sc->chip_type != ED_CHIP_TYPE_WD790)) {
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sc->wd_laar_proto = (pmem >> 19) &
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ED_WD_LAAR_ADDRHI;
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ed_asic_outb(sc, ED_WD_LAAR, sc->wd_laar_proto);
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}
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}
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/*
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* Set address and enable interface shared memory.
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*/
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if (sc->chip_type != ED_CHIP_TYPE_WD790) {
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if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER) {
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ed_asic_outb(sc, ED_WD_MSR + 1,
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((pmem >> 8) & 0xe0) | 4);
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ed_asic_outb(sc, ED_WD_MSR + 2, ((pmem >> 16) & 0x0f));
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ed_asic_outb(sc, ED_WD_MSR,
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ED_WD_MSR_MENB | ED_WD_MSR_POW);
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} else {
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ed_asic_outb(sc, ED_WD_MSR, ((pmem >> 13) &
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ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
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}
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sc->cr_proto = ED_CR_RD2;
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} else {
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ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
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ed_asic_outb(sc, ED_WD790_HWR,
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(ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH));
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ed_asic_outb(sc, ED_WD790_RAR,
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((pmem >> 13) & 0x0f) | ((pmem >> 11) & 0x40) |
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(ed_asic_inb(sc, ED_WD790_RAR) & 0xb0));
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ed_asic_outb(sc, ED_WD790_HWR,
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(ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
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sc->cr_proto = 0;
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}
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/*
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* Disable 16bit access to shared memory - we leave it
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* disabled so that 1) machines reboot properly when the board
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* is set 16 bit mode and there are conflicting 8bit
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* devices/ROMS in the same 128k address space as this boards
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* shared memory. and 2) so that other 8 bit devices with
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* shared memory can be used in this 128k region, too.
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*/
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error = ed_clear_memory(dev);
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ed_disable_16bit_access(sc);
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sc->sc_write_mbufs = ed_shmem_write_mbufs;
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return (error);
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}
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int
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ed_probe_WD80x3(device_t dev, int port_rid, int flags)
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{
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struct ed_softc *sc = device_get_softc(dev);
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int error;
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static uint16_t *intr_vals[] = {ed_intr_val, ed_790_intr_val};
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error = ed_alloc_port(dev, port_rid, ED_WD_IO_PORTS);
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if (error)
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return (error);
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sc->asic_offset = ED_WD_ASIC_OFFSET;
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sc->nic_offset = ED_WD_NIC_OFFSET;
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return ed_probe_WD80x3_generic(dev, flags, intr_vals);
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}
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