28257ccca8
- Read interrupt properties at bus enumeration time and store it into global mapping table. - At bus_activate_resource() time, given mapping entry is resolved and connected to real interrupt source. A copy of mapping entry is attached to given resource. - At bus_setup_intr() time, mapping entry stored in resource is used for delivery of requested interrupt configuration. - For MSI/MSIX interrupts, mapping entry is created within pci_alloc_msi()/pci_alloc_msix() call. - For legacy PCI interrupts, mapping entry must be created within pcib_route_interrupt() by pcib driver itself. Reviewed by: nwhitehorn, andrew Differential Revision: https://reviews.freebsd.org/D7493
282 lines
7.6 KiB
C
282 lines
7.6 KiB
C
/*
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* Copyright (C) 2016 Cavium Inc.
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/socket.h>
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#include <sys/queue.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/simplebus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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static MALLOC_DEFINE(M_MRMLB, "MRML bridge", "Cavium MRML bridge");
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static device_probe_t mrmlb_fdt_probe;
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static device_attach_t mrmlb_fdt_attach;
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static struct resource * mrmlb_ofw_bus_alloc_res(device_t, device_t, int, int *,
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rman_res_t, rman_res_t, rman_res_t, u_int);
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static const struct ofw_bus_devinfo * mrmlb_ofw_get_devinfo(device_t, device_t);
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static device_method_t mrmlbus_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mrmlb_fdt_probe),
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DEVMETHOD(device_attach, mrmlb_fdt_attach),
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/* Bus interface */
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DEVMETHOD(bus_alloc_resource, mrmlb_ofw_bus_alloc_res),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, mrmlb_ofw_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(mrmlbus, mrmlbus_fdt_driver, mrmlbus_fdt_methods,
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sizeof(struct simplebus_softc));
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static devclass_t mrmlbus_fdt_devclass;
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EARLY_DRIVER_MODULE(mrmlbus, pcib, mrmlbus_fdt_driver, mrmlbus_fdt_devclass, 0, 0,
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BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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MODULE_VERSION(mrmlbus, 1);
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static int mrmlb_ofw_fill_ranges(phandle_t, struct simplebus_softc *);
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static int mrmlb_ofw_bus_attach(device_t);
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static int
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mrmlb_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "cavium,thunder-8890-mrml-bridge"))
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return (ENXIO);
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device_set_desc(dev, "Cavium ThunderX MRML bridge");
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return (BUS_PROBE_SPECIFIC);
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}
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static int
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mrmlb_fdt_attach(device_t dev)
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{
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int err;
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err = mrmlb_ofw_bus_attach(dev);
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if (err != 0)
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return (err);
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return (bus_generic_attach(dev));
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}
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/* OFW bus interface */
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struct mrmlb_ofw_devinfo {
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struct ofw_bus_devinfo di_dinfo;
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struct resource_list di_rl;
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};
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static const struct ofw_bus_devinfo *
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mrmlb_ofw_get_devinfo(device_t bus __unused, device_t child)
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{
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struct mrmlb_ofw_devinfo *di;
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di = device_get_ivars(child);
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return (&di->di_dinfo);
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}
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static struct resource *
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mrmlb_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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struct simplebus_softc *sc;
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struct mrmlb_ofw_devinfo *di;
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struct resource_list_entry *rle;
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int i;
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if (RMAN_IS_DEFAULT_RANGE(start, end)) {
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if ((di = device_get_ivars(child)) == NULL)
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return (NULL);
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if (type == SYS_RES_IOPORT)
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type = SYS_RES_MEMORY;
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/* Find defaults for this rid */
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rle = resource_list_find(&di->di_rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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start = rle->start;
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end = rle->end;
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count = rle->count;
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}
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sc = device_get_softc(bus);
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if (type == SYS_RES_MEMORY) {
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/* Remap through ranges property */
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for (i = 0; i < sc->nranges; i++) {
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if (start >= sc->ranges[i].bus && end <
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sc->ranges[i].bus + sc->ranges[i].size) {
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start -= sc->ranges[i].bus;
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start += sc->ranges[i].host;
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end -= sc->ranges[i].bus;
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end += sc->ranges[i].host;
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break;
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}
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}
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if (i == sc->nranges && sc->nranges != 0) {
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device_printf(bus, "Could not map resource "
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"%#lx-%#lx\n", start, end);
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return (NULL);
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}
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}
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return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
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count, flags));
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}
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/* Helper functions */
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static int
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mrmlb_ofw_fill_ranges(phandle_t node, struct simplebus_softc *sc)
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{
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int host_address_cells;
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cell_t *base_ranges;
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ssize_t nbase_ranges;
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int err;
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int i, j, k;
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err = OF_searchencprop(OF_parent(node), "#address-cells",
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&host_address_cells, sizeof(host_address_cells));
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if (err <= 0)
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return (-1);
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nbase_ranges = OF_getproplen(node, "ranges");
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if (nbase_ranges < 0)
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return (-1);
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sc->nranges = nbase_ranges / sizeof(cell_t) /
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(sc->acells + host_address_cells + sc->scells);
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if (sc->nranges == 0)
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return (0);
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sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
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M_MRMLB, M_WAITOK);
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base_ranges = malloc(nbase_ranges, M_MRMLB, M_WAITOK);
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OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
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for (i = 0, j = 0; i < sc->nranges; i++) {
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sc->ranges[i].bus = 0;
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for (k = 0; k < sc->acells; k++) {
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sc->ranges[i].bus <<= 32;
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sc->ranges[i].bus |= base_ranges[j++];
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}
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sc->ranges[i].host = 0;
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for (k = 0; k < host_address_cells; k++) {
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sc->ranges[i].host <<= 32;
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sc->ranges[i].host |= base_ranges[j++];
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}
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sc->ranges[i].size = 0;
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for (k = 0; k < sc->scells; k++) {
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sc->ranges[i].size <<= 32;
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sc->ranges[i].size |= base_ranges[j++];
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}
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}
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free(base_ranges, M_MRMLB);
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return (sc->nranges);
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}
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static int
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mrmlb_ofw_bus_attach(device_t dev)
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{
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struct simplebus_softc *sc;
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struct mrmlb_ofw_devinfo *di;
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device_t child;
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phandle_t parent, node;
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parent = ofw_bus_get_node(dev);
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simplebus_init(dev, parent);
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sc = device_get_softc(dev);
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if (mrmlb_ofw_fill_ranges(parent, sc) < 0) {
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device_printf(dev, "could not get ranges\n");
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return (ENXIO);
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}
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/* Iterate through all bus subordinates */
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for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
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/* Allocate and populate devinfo. */
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di = malloc(sizeof(*di), M_MRMLB, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
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free(di, M_MRMLB);
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continue;
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}
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/* Initialize and populate resource list. */
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resource_list_init(&di->di_rl);
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ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
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&di->di_rl);
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ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
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/* Add newbus device for this FDT node */
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child = device_add_child(dev, NULL, -1);
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if (child == NULL) {
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resource_list_free(&di->di_rl);
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ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
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free(di, M_MRMLB);
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continue;
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}
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device_set_ivars(child, di);
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}
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return (0);
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}
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