7330ff0c10
Submitted by: Michal Meloun <meloun@miracle.cz>
383 lines
8.6 KiB
C
383 lines
8.6 KiB
C
/*
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* Copyright (c) 2003 Marcel Moolenaar
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* Copyright (c) 2007-2009 Andrew Turner
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* Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/cons.h>
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#include <sys/tty.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_bus.h>
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#include <arm/samsung/exynos/exynos_uart.h>
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#include "uart_if.h"
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#define DEF_CLK 100000000
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static int sscomspeed(long, long);
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static int exynos4210_uart_param(struct uart_bas *, int, int, int, int);
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/*
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* Low-level UART interface.
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*/
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static int exynos4210_probe(struct uart_bas *bas);
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static void exynos4210_init(struct uart_bas *bas, int, int, int, int);
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static void exynos4210_term(struct uart_bas *bas);
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static void exynos4210_putc(struct uart_bas *bas, int);
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static int exynos4210_rxready(struct uart_bas *bas);
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static int exynos4210_getc(struct uart_bas *bas, struct mtx *mtx);
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extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
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static int
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sscomspeed(long speed, long frequency)
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{
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int x;
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if (speed <= 0 || frequency <= 0)
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return (-1);
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x = (frequency / 16) / speed;
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return (x-1);
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}
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static int
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exynos4210_uart_param(struct uart_bas *bas, int baudrate, int databits,
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int stopbits, int parity)
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{
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int brd, ulcon;
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ulcon = 0;
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switch(databits) {
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case 5:
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ulcon |= ULCON_LENGTH_5;
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break;
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case 6:
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ulcon |= ULCON_LENGTH_6;
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break;
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case 7:
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ulcon |= ULCON_LENGTH_7;
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break;
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case 8:
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ulcon |= ULCON_LENGTH_8;
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break;
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default:
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return (EINVAL);
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}
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switch (parity) {
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case UART_PARITY_NONE:
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ulcon |= ULCON_PARITY_NONE;
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break;
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case UART_PARITY_ODD:
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ulcon |= ULCON_PARITY_ODD;
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break;
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case UART_PARITY_EVEN:
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ulcon |= ULCON_PARITY_EVEN;
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break;
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case UART_PARITY_MARK:
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case UART_PARITY_SPACE:
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default:
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return (EINVAL);
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}
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if (stopbits == 2)
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ulcon |= ULCON_STOP;
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uart_setreg(bas, SSCOM_ULCON, ulcon);
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brd = sscomspeed(baudrate, bas->rclk);
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uart_setreg(bas, SSCOM_UBRDIV, brd);
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return (0);
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}
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struct uart_ops uart_exynos4210_ops = {
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.probe = exynos4210_probe,
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.init = exynos4210_init,
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.term = exynos4210_term,
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.putc = exynos4210_putc,
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.rxready = exynos4210_rxready,
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.getc = exynos4210_getc,
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};
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static int
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exynos4210_probe(struct uart_bas *bas)
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{
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return (0);
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}
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static void
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exynos4210_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
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int parity)
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{
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if (bas->rclk == 0)
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bas->rclk = DEF_CLK;
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KASSERT(bas->rclk != 0, ("exynos4210_init: Invalid rclk"));
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uart_setreg(bas, SSCOM_UCON, 0);
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uart_setreg(bas, SSCOM_UFCON,
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UFCON_TXTRIGGER_8 | UFCON_RXTRIGGER_8 |
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UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
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UFCON_FIFO_ENABLE);
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exynos4210_uart_param(bas, baudrate, databits, stopbits, parity);
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/* Enable UART. */
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uart_setreg(bas, SSCOM_UCON, UCON_TXMODE_INT | UCON_RXMODE_INT |
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UCON_TOINT);
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uart_setreg(bas, SSCOM_UMCON, UMCON_RTS);
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}
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static void
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exynos4210_term(struct uart_bas *bas)
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{
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/* XXX */
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}
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static void
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exynos4210_putc(struct uart_bas *bas, int c)
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{
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while ((bus_space_read_4(bas->bst, bas->bsh, SSCOM_UFSTAT) &
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UFSTAT_TXFULL) == UFSTAT_TXFULL)
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continue;
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uart_setreg(bas, SSCOM_UTXH, c);
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}
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static int
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exynos4210_rxready(struct uart_bas *bas)
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{
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return ((uart_getreg(bas, SSCOM_UTRSTAT) & UTRSTAT_RXREADY) ==
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UTRSTAT_RXREADY);
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}
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static int
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exynos4210_getc(struct uart_bas *bas, struct mtx *mtx)
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{
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int utrstat;
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utrstat = bus_space_read_1(bas->bst, bas->bsh, SSCOM_UTRSTAT);
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while (!(utrstat & UTRSTAT_RXREADY)) {
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utrstat = bus_space_read_1(bas->bst, bas->bsh, SSCOM_UTRSTAT);
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continue;
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}
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return (bus_space_read_1(bas->bst, bas->bsh, SSCOM_URXH));
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}
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static int exynos4210_bus_probe(struct uart_softc *sc);
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static int exynos4210_bus_attach(struct uart_softc *sc);
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static int exynos4210_bus_flush(struct uart_softc *, int);
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static int exynos4210_bus_getsig(struct uart_softc *);
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static int exynos4210_bus_ioctl(struct uart_softc *, int, intptr_t);
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static int exynos4210_bus_ipend(struct uart_softc *);
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static int exynos4210_bus_param(struct uart_softc *, int, int, int, int);
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static int exynos4210_bus_receive(struct uart_softc *);
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static int exynos4210_bus_setsig(struct uart_softc *, int);
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static int exynos4210_bus_transmit(struct uart_softc *);
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static kobj_method_t exynos4210_methods[] = {
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KOBJMETHOD(uart_probe, exynos4210_bus_probe),
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KOBJMETHOD(uart_attach, exynos4210_bus_attach),
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KOBJMETHOD(uart_flush, exynos4210_bus_flush),
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KOBJMETHOD(uart_getsig, exynos4210_bus_getsig),
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KOBJMETHOD(uart_ioctl, exynos4210_bus_ioctl),
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KOBJMETHOD(uart_ipend, exynos4210_bus_ipend),
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KOBJMETHOD(uart_param, exynos4210_bus_param),
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KOBJMETHOD(uart_receive, exynos4210_bus_receive),
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KOBJMETHOD(uart_setsig, exynos4210_bus_setsig),
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KOBJMETHOD(uart_transmit, exynos4210_bus_transmit),
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{0, 0 }
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};
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int
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exynos4210_bus_probe(struct uart_softc *sc)
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{
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sc->sc_txfifosz = 16;
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sc->sc_rxfifosz = 16;
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return (0);
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}
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static int
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exynos4210_bus_attach(struct uart_softc *sc)
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{
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sc->sc_hwiflow = 0;
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sc->sc_hwoflow = 0;
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return (0);
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}
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static int
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exynos4210_bus_transmit(struct uart_softc *sc)
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{
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int i;
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int reg;
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uart_lock(sc->sc_hwmtx);
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for (i = 0; i < sc->sc_txdatasz; i++) {
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exynos4210_putc(&sc->sc_bas, sc->sc_txbuf[i]);
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uart_barrier(&sc->sc_bas);
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}
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sc->sc_txbusy = 1;
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uart_unlock(sc->sc_hwmtx);
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/* unmask TX interrupt */
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reg = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTM);
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reg &= ~(1 << 2);
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bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTM, reg);
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return (0);
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}
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static int
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exynos4210_bus_setsig(struct uart_softc *sc, int sig)
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{
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return (0);
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}
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static int
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exynos4210_bus_receive(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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bas = &sc->sc_bas;
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while (bus_space_read_4(bas->bst, bas->bsh,
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SSCOM_UFSTAT) & UFSTAT_RXCOUNT)
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uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH));
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return (0);
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}
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static int
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exynos4210_bus_param(struct uart_softc *sc, int baudrate, int databits,
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int stopbits, int parity)
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{
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int error;
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if (sc->sc_bas.rclk == 0)
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sc->sc_bas.rclk = DEF_CLK;
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KASSERT(sc->sc_bas.rclk != 0, ("exynos4210_init: Invalid rclk"));
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uart_lock(sc->sc_hwmtx);
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error = exynos4210_uart_param(&sc->sc_bas, baudrate, databits, stopbits,
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parity);
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uart_unlock(sc->sc_hwmtx);
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return (error);
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}
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static int
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exynos4210_bus_ipend(struct uart_softc *sc)
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{
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uint32_t ints;
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uint32_t txempty, rxready;
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int reg;
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int ipend;
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uart_lock(sc->sc_hwmtx);
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ints = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTP);
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bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTP, ints);
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txempty = (1 << 2);
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rxready = (1 << 0);
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ipend = 0;
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if ((ints & txempty) > 0) {
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if (sc->sc_txbusy != 0)
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ipend |= SER_INT_TXIDLE;
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/* mask TX interrupt */
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reg = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh,
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SSCOM_UINTM);
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reg |= (1 << 2);
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bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh,
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SSCOM_UINTM, reg);
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}
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if ((ints & rxready) > 0) {
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ipend |= SER_INT_RXREADY;
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}
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uart_unlock(sc->sc_hwmtx);
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return (ipend);
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}
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static int
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exynos4210_bus_flush(struct uart_softc *sc, int what)
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{
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return (0);
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}
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static int
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exynos4210_bus_getsig(struct uart_softc *sc)
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{
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return (0);
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}
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static int
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exynos4210_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
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{
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return (EINVAL);
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}
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struct uart_class uart_exynos4210_class = {
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"exynos4210 class",
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exynos4210_methods,
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1,
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.uc_ops = &uart_exynos4210_ops,
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.uc_range = 8,
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.uc_rclk = 0,
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};
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