45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
112 lines
2.6 KiB
C
112 lines
2.6 KiB
C
/*
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* Copyright (c) 2000-2003, 2005, Juniper Networks, Inc.
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* All rights reserved.
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* JNPR: am29lv081b.h,v 1.1 2006/08/07 05:38:57 katta
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*
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* am29lv081b.h -- am29lv081b definitions
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*
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* Chan Lee, May 2000
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*/
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// $FreeBSD$
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#ifndef __AM29LV081B_H__
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#define __AM29LV081B_H__
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/*
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* Identifiers for the am29lv081b chip
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*/
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#define AM29L_MAN_ID 0x01
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#define AM29L_DEV_ID 0x38
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#define AM29L_DEV_ID_OFFSET 0x01
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#define AM29L_TIMEOUT 3000 /* 3 seconds in ms */
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#define AM29L_ERASE_TIME 30000 /* 30 seconds in ms */
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/*
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* This is defined for human consumption.
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*/
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#define AM29L_BANNER "AMD29L081B 8Mb flash"
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/*
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* Sector definitions.
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*/
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#define AM29L_SA0 0x00000
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#define AM29L_SA1 0x10000
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#define AM29L_SA2 0x20000
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#define AM29L_SA3 0x30000
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#define AM29L_SA4 0x40000
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#define AM29L_SA5 0x50000
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#define AM29L_SA6 0x60000
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#define AM29L_SA7 0x70000
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#define AM29L_SA8 0x80000
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#define AM29L_SA9 0x90000
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#define AM29L_SA10 0xA0000
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#define AM29L_SA11 0xB0000
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#define AM29L_SA12 0xC0000
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#define AM29L_SA13 0xD0000
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#define AM29L_SA14 0xE0000
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#define AM29L_SA15 0xF0000
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#define AM29L_BANK_MASK 0xFFF00000
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#define AM29L_SECTOR_MASK 0xFFFF0000
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#define AM29L_SECTOR_SIZE 0x10000
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#define AM29L_SECTOR_PER_BLK 4
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#define AM29L_TOTAL_SECTORS 16
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#define AM29L_PROTECT_OFFSET 0x2
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/*
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* Definitions for the unlock sequence, both
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* the address offset and the data definition.
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*/
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#define AM29L_ULCK_ADDR1 0x555
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#define AM29L_ULCK_ADDR2 0x2AA
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#define AM29L_ULCK_DATA1 0xAA
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#define AM29L_ULCK_DATA2 0x55
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/*
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* Command definitions for the am29lv081b. Most
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* of the following command can only be issue
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* after the unlock command sequence.
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*/
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#define AM29L_CMD_AUTO 0x90
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#define AM29L_CMD_BYTE_PROGRAM 0xA0
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#define AM29L_CMD_ERASE 0x80
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#define AM29L_CMD_ERASE_CHIP 0x10
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#define AM29L_CMD_ERASE_SECT 0x30
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#define AM29L_CMD_RESET 0xF0
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/*
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* Masks for get the DQ3, DQ5, DQ6, DQ7 bits.
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* All these bits signals the status of the
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* command operations.
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*/
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#define AM29L_DQ2_MASK 0x04
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#define AM29L_DQ3_MASK 0x08
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#define AM29L_DQ5_MASK 0x20
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#define AM29L_DQ6_MASK 0x40
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#define AM29L_DQ7_MASK 0x80
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#define AM29L_GET_DQ2(data) ((data & AM29L_DQ2_MASK) >> 2)
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#define AM29L_GET_DQ3(data) ((data & AM29L_DQ3_MASK) >> 3)
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#define AM29L_GET_DQ5(data) ((data & AM29L_DQ5_MASK) >> 5)
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#define AM29L_GET_DQ6(data) ((data & AM29L_DQ6_MASK) >> 6)
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#define AM29L_GET_DQ7(data) ((data & AM29L_DQ7_MASK) >> 7)
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extern void flash_add_amd29l081b (flash_device_t *dev);
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static inline u_int32_t
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am29f_start_addr_flash(u_int8_t *ptr)
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{
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return((u_int32_t)ptr & AM29L_SECTOR_MASK);
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}
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#endif /* __AM29LV081B_H_ */
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/* End of file */
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