853837b8ea
and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
169 lines
8.0 KiB
C
169 lines
8.0 KiB
C
/*
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* Copyright (c) 2001 Wind River Systems
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* Copyright (c) 2001
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* Bill Paul <wpaul@bsdi.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_MII_NSGPHYREG_H_
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#define _DEV_MII_NSGPHYREG_H_
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/*
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* NatSemi DP83891 registers
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*/
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#define NSGPHY_MII_BMCR 0x00
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#define NSGPHY_BMCR_RESET 0x8000
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#define NSGPHY_BMCR_LOOP 0x4000
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#define NSGPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
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#define NSGPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
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#define NSGPHY_BMCR_PDOWN 0x0800 /* Power down */
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#define NSGPHY_BMCR_ISO 0x0400 /* Isolate */
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#define NSGPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
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#define NSGPHY_BMCR_FDX 0x0100 /* Duplex mode */
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#define NSGPHY_BMCR_CTEST 0x0080 /* Collision test enable */
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#define NSGPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */
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#define NSGPHY_S1000 NSGPHY_BMCR_SPD1 /* 1000mbps */
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#define NSGPHY_S100 NSGPHY_BMCR_SPD0 /* 100mpbs */
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#define NSGPHY_S10 0 /* 10mbps */
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#define NSGPHY_MII_BMSR 0x01
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#define NSGPHY_BMSR_100BT4 0x8000 /* 100baseT4 support */
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#define NSGPHY_BMSR_100FDX 0x4000 /* 100baseTX full duplex */
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#define NSGPHY_BMSR_100HDX 0x2000 /* 100baseTX half duplex */
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#define NSGPHY_BMSR_10FDX 0x1000 /* 10baseT full duplex */
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#define NSGPHY_BMSR_10HDX 0x0800 /* 10baseT half duplex */
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#define NSGPHY_BMSR_100T2FDX 0x0400 /* 100baseT2 full duplex */
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#define NSGPHY_BMSR_100T2HDX 0x0200 /* 100baseT2 full duplex */
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#define NSGPHY_BMSR_EXTSTS 0x0100 /* 1000baseT Extended status present */
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#define NSGPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */
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#define NSGPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */
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#define NSGPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */
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#define NSGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
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#define NSGPHY_BMSR_LINK 0x0004 /* Link status */
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#define NSGPHY_BMSR_JABBER 0x0002 /* Jabber detected */
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#define NSGPHY_BMSR_EXT 0x0001 /* Extended capability */
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#define NSGPHY_MII_ANAR 0x04
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#define NSGPHY_ANAR_NP 0x8000 /* Next page */
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#define NSGPHY_ANAR_RF 0x2000 /* Remote fault */
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#define NSGPHY_ANAR_ASP 0x0800 /* Asymetric Pause */
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#define NSGPHY_ANAR_PC 0x0400 /* Pause capable */
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#define NSGPHY_ANAR_100T4 0x0200 /* 100baseT4 support */
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#define NSGPHY_ANAR_100FDX 0x0100 /* 100baseTX full duplex support */
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#define NSGPHY_ANAR_100HDX 0x0080 /* 100baseTX half duplex support */
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#define NSGPHY_ANAR_10FDX 0x0040 /* 10baseT full duplex support */
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#define NSGPHY_ANAR_10HDX 0x0020 /* 10baseT half duplex support */
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#define NSGPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */
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#define NSGPHY_MII_ANLPAR 0x05
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#define NSGPHY_ANLPAR_NP 0x8000 /* Next page */
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#define NSGPHY_ANLPAR_RF 0x2000 /* Remote fault */
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#define NSGPHY_ANLPAR_ASP 0x0800 /* Asymetric Pause */
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#define NSGPHY_ANLPAR_PC 0x0400 /* Pause capable */
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#define NSGPHY_ANLPAR_100T4 0x0200 /* 100baseT4 support */
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#define NSGPHY_ANLPAR_100FDX 0x0100 /* 100baseTX full duplex support */
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#define NSGPHY_ANLPAR_100HDX 0x0080 /* 100baseTX half duplex support */
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#define NSGPHY_ANLPAR_10FDX 0x0040 /* 10baseT full duplex support */
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#define NSGPHY_ANLPAR_10HDX 0x0020 /* 10baseT half duplex support */
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#define NSGPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */
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#define NSGPHY_SEL_TYPE 0x0001 /* ethernet */
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#define NSGPHY_MII_ANER 0x06
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#define NSGPHY_ANER_PDF 0x0010 /* Parallel detection fault */
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#define NSGPHY_ANER_LPNP 0x0008 /* Link partner can next page */
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#define NSGPHY_ANER_NP 0x0004 /* Local PHY can next page */
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#define NSGPHY_ANER_RX 0x0002 /* Next page received */
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#define NSGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */
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#define NSGPHY_MII_NEXTP 0x07 /* Next page */
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#define NSGPHY_NEXTP_NP 0x8000 /* Next page indication */
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#define NSGPHY_NEXTP_MP 0x2000 /* Message page */
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#define NSGPHY_NEXTP_ACK2 0x1000 /* Acknowledge 2 */
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#define NSGPHY_NEXTP_TOGGLE 0x0800 /* Toggle */
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#define NSGPHY_NEXTP_CODE 0x07FF /* Code field */
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#define NSGPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */
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#define NSGPHY_NEXTPLP_NP 0x8000 /* Next page indication */
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#define NSGPHY_NEXTPLP_MP 0x2000 /* Message page */
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#define NSGPHY_NEXTPLP_ACK2 0x1000 /* Acknowledge 2 */
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#define NSGPHY_NEXTPLP_TOGGLE 0x0800 /* Toggle */
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#define NSGPHY_NEXTPLP_CODE 0x07FF /* Code field */
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#define NSGPHY_MII_1000CTL 0x09 /* 1000baseT control */
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#define NSGPHY_1000CTL_TST 0xE000 /* test modes */
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#define NSGPHY_1000CTL_MSE 0x1000 /* Master/Slave config enable */
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#define NSGPHY_1000CTL_MSC 0x0800 /* Master/Slave setting */
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#define NSGPHY_1000CTL_RD 0x0400 /* Port type: Repeater/DTE */
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#define NSGPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */
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#define NSGPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */
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#define NSGPHY_MII_1000STS 0x0A /* 1000baseT status */
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#define NSGPHY_1000STS_MSF 0x8000 /* Master/slave fault */
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#define NSGPHY_1000STS_MSR 0x4000 /* Master/slave result */
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#define NSGPHY_1000STS_LRS 0x2000 /* Local receiver status */
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#define NSGPHY_1000STS_RRS 0x1000 /* Remote receiver status */
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#define NSGPHY_1000STS_LPFD 0x0800 /* Link partner can FD */
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#define NSGPHY_1000STS_LPHD 0x0400 /* Link partner can HD */
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#define NSGPHY_1000STS_ASM_DIR 0x0200 /* Asymetric pause capable */
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#define NSGPHY_1000STS_IEC 0x00FF /* Idle error count */
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#define NSGPHY_MII_EXTSTS 0x0F /* Extended status */
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#define NSGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
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#define NSGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
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#define NSGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
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#define NSGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
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#define NSGPHY_MII_STRAPOPT 0x10 /* Strap options */
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#define NSGPHY_STRAPOPT_PHYADDR 0xF800 /* PHY address */
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#define NSGPHY_STRAPOPT_COMPAT 0x0400 /* Broadcom compat mode */
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#define NSGPHY_STRAPOPT_MMSE 0x0200 /* Manual master/slave enable */
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#define NSGPHY_STRAPOPT_ANEG 0x0100 /* Autoneg enable */
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#define NSGPHY_STRAPOPT_MMSV 0x0080 /* Manual master/slave setting */
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#define NSGPHY_STRAPOPT_1000HDX 0x0010 /* Advertise 1000 half-duplex */
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#define NSGPHY_STRAPOPT_1000FDX 0x0008 /* Advertise 1000 full-duplex */
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#define NSGPHY_STRAPOPT_100_ADV 0x0004 /* Advertise 100 full/half-duplex */
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#define NSGPHY_STRAPOPT_SPDSEL 0x0003 /* speed selection */
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#define NSGPHY_MII_PHYSUP 0x11 /* PHY support/current status */
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#define NSGPHY_PHYSUP_SPDSTS 0x0018 /* speed status */
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#define NSGPHY_PHYSUP_LNKSTS 0x0004 /* link status */
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#define NSGPHY_PHYSUP_DUPSTS 0x0002 /* duplex status 1 == full */
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#define NSGPHY_PHYSUP_10BT 0x0001 /* 10baseT resolved */
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#define NSGPHY_SPDSTS_1000 0x0010
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#define NSGPHY_SPDSTS_100 0x0008
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#define NSGPHY_SPDSTS_10 0x0000
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#endif /* _DEV_NSGPHY_MIIREG_H_ */
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