ef1e56b6d4
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4. This also adds support for various built-in hardware found on Apple G5 hardware (e.g. the IBM CPC925 northbridge). Reviewed by: grehan
626 lines
15 KiB
C
626 lines
15 KiB
C
/*-
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* Copyright (C) 2008 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <powerpc/powermac/cpchtvar.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include "pcib_if.h"
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#include "opt_isa.h"
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#ifdef DEV_ISA
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#include <isa/isavar.h>
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#endif
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static MALLOC_DEFINE(M_CPCHT, "cpcht", "CPC HT device information");
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/*
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* HT Driver methods.
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*/
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static int cpcht_probe(device_t);
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static int cpcht_attach(device_t);
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static ofw_bus_get_devinfo_t cpcht_get_devinfo;
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static device_method_t cpcht_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, cpcht_probe),
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DEVMETHOD(device_attach, cpcht_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, cpcht_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t cpcht_driver = {
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"cpcht",
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cpcht_methods,
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0
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};
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static devclass_t cpcht_devclass;
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DRIVER_MODULE(cpcht, nexus, cpcht_driver, cpcht_devclass, 0, 0);
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static int
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cpcht_probe(device_t dev)
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{
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const char *type, *compatible;
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type = ofw_bus_get_type(dev);
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compatible = ofw_bus_get_compat(dev);
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if (type == NULL || compatible == NULL)
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return (ENXIO);
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if (strcmp(type, "ht") != 0)
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return (ENXIO);
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if (strcmp(compatible, "u3-ht") == 0) {
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device_set_desc(dev, "IBM CPC925 HyperTransport Tunnel");
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return (0);
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} else if (strcmp(compatible,"u4-ht") == 0) {
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device_set_desc(dev, "IBM CPC945 HyperTransport Tunnel");
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return (0);
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}
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return (ENXIO);
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}
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static int
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cpcht_attach(device_t dev)
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{
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phandle_t root, child;
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device_t cdev;
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struct ofw_bus_devinfo *dinfo;
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u_int32_t reg[6];
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root = ofw_bus_get_node(dev);
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if (OF_getprop(root, "reg", reg, sizeof(reg)) < 8)
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return (ENXIO);
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for (child = OF_child(root); child != 0; child = OF_peer(child)) {
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dinfo = malloc(sizeof(*dinfo), M_CPCHT, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
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free(dinfo, M_CPCHT);
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continue;
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}
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cdev = device_add_child(dev, NULL, -1);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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dinfo->obd_name);
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ofw_bus_gen_destroy_devinfo(dinfo);
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free(dinfo, M_CPCHT);
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continue;
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}
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device_set_ivars(cdev, dinfo);
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}
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return (bus_generic_attach(dev));
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}
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static const struct ofw_bus_devinfo *
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cpcht_get_devinfo(device_t dev, device_t child)
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{
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return (device_get_ivars(child));
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}
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#ifdef DEV_ISA
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/*
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* CPC ISA Device interface.
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*/
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static int cpcisa_probe(device_t);
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/*
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* Driver methods.
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*/
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static device_method_t cpcisa_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, cpcisa_probe),
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DEVMETHOD(device_attach, isab_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
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{0,0}
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};
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static driver_t cpcisa_driver = {
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"isab",
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cpcisa_methods,
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0
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};
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DRIVER_MODULE(cpcisa, cpcht, cpcisa_driver, isab_devclass, 0, 0);
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static int
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cpcisa_probe(device_t dev)
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{
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const char *type;
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type = ofw_bus_get_type(dev);
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if (type == NULL)
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return (ENXIO);
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if (strcmp(type, "isa") != 0)
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return (ENXIO);
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device_set_desc(dev, "HyperTransport-ISA bridge");
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return (0);
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}
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#endif /* DEV_ISA */
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/*
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* CPC PCI Device interface.
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*/
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static int cpcpci_probe(device_t);
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static int cpcpci_attach(device_t);
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/*
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* Bus interface.
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*/
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static int cpcpci_read_ivar(device_t, device_t, int,
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uintptr_t *);
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static struct resource * cpcpci_alloc_resource(device_t bus,
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device_t child, int type, int *rid, u_long start,
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u_long end, u_long count, u_int flags);
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static int cpcpci_activate_resource(device_t bus, device_t child,
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int type, int rid, struct resource *res);
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/*
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* pcib interface.
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*/
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static int cpcpci_maxslots(device_t);
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static u_int32_t cpcpci_read_config(device_t, u_int, u_int, u_int,
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u_int, int);
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static void cpcpci_write_config(device_t, u_int, u_int, u_int,
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u_int, u_int32_t, int);
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static int cpcpci_route_interrupt(device_t, device_t, int);
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/*
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* ofw_bus interface
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*/
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static phandle_t cpcpci_get_node(device_t bus, device_t child);
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/*
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* Driver methods.
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*/
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static device_method_t cpcpci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, cpcpci_probe),
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DEVMETHOD(device_attach, cpcpci_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, cpcpci_read_ivar),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, cpcpci_alloc_resource),
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DEVMETHOD(bus_activate_resource, cpcpci_activate_resource),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, cpcpci_maxslots),
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DEVMETHOD(pcib_read_config, cpcpci_read_config),
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DEVMETHOD(pcib_write_config, cpcpci_write_config),
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DEVMETHOD(pcib_route_interrupt, cpcpci_route_interrupt),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, cpcpci_get_node),
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{ 0, 0 }
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};
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static driver_t cpcpci_driver = {
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"pcib",
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cpcpci_methods,
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sizeof(struct cpcpci_softc)
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};
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static devclass_t cpcpci_devclass;
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DRIVER_MODULE(cpcpci, cpcht, cpcpci_driver, cpcpci_devclass, 0, 0);
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static int
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cpcpci_probe(device_t dev)
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{
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const char *type;
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type = ofw_bus_get_type(dev);
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if (type == NULL)
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return (ENXIO);
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if (strcmp(type, "pci") != 0)
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return (ENXIO);
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device_set_desc(dev, "HyperTransport-PCI bridge");
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return (0);
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}
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static int
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cpcpci_attach(device_t dev)
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{
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struct cpcpci_softc *sc;
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phandle_t node;
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u_int32_t reg[2], busrange[2], config_base;
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struct cpcpci_range *rp, *io, *mem[2];
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struct cpcpci_range fakeio;
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int nmem, i;
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node = ofw_bus_get_node(dev);
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sc = device_get_softc(dev);
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if (OF_getprop(OF_parent(node), "reg", reg, sizeof(reg)) < 8)
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return (ENXIO);
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if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
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return (ENXIO);
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sc->sc_dev = dev;
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sc->sc_node = node;
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sc->sc_bus = busrange[0];
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config_base = reg[1];
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if (sc->sc_bus)
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config_base += 0x01000000UL + (sc->sc_bus << 16);
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sc->sc_data = (vm_offset_t)pmap_mapdev(config_base, PAGE_SIZE << 4);
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bzero(sc->sc_range, sizeof(sc->sc_range));
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sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
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sizeof(sc->sc_range));
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if (sc->sc_nrange == -1) {
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device_printf(dev, "could not get ranges\n");
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return (ENXIO);
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}
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sc->sc_range[6].pci_hi = 0;
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io = NULL;
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nmem = 0;
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for (rp = sc->sc_range; rp->pci_hi != 0; rp++) {
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switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
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case OFW_PCI_PHYS_HI_SPACE_CONFIG:
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break;
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case OFW_PCI_PHYS_HI_SPACE_IO:
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io = rp;
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM32:
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mem[nmem] = rp;
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nmem++;
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM64:
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break;
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}
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}
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if (io == NULL) {
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/*
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* On at least some machines, the I/O port range is
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* not exported in the OF device tree. So hardcode it.
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*/
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fakeio.host_lo = 0;
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fakeio.pci_lo = reg[1];
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fakeio.size_lo = 0x00400000;
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if (sc->sc_bus)
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fakeio.pci_lo += 0x02000000UL + (sc->sc_bus << 14);
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io = &fakeio;
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}
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sc->sc_io_rman.rm_type = RMAN_ARRAY;
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sc->sc_io_rman.rm_descr = "CPC 9xx PCI I/O Ports";
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sc->sc_iostart = io->host_lo;
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if (rman_init(&sc->sc_io_rman) != 0 ||
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rman_manage_region(&sc->sc_io_rman, io->pci_lo,
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io->pci_lo + io->size_lo - 1) != 0) {
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device_printf(dev, "failed to set up io range management\n");
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return (ENXIO);
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}
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if (nmem == 0) {
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device_printf(dev, "can't find mem ranges\n");
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return (ENXIO);
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}
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "CPC 9xx PCI Memory";
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if (rman_init(&sc->sc_mem_rman) != 0) {
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device_printf(dev,
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"failed to init mem range resources\n");
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return (ENXIO);
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}
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for (i = 0; i < nmem; i++) {
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if (rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
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mem[i]->pci_lo + mem[i]->size_lo - 1) != 0) {
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device_printf(dev,
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"failed to set up memory range management\n");
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return (ENXIO);
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}
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}
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ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
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device_add_child(dev, "pci", device_get_unit(dev));
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return (bus_generic_attach(dev));
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}
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static int
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cpcpci_maxslots(device_t dev)
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{
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return (PCI_SLOTMAX);
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}
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static u_int32_t
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cpcpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
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int width)
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{
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struct cpcpci_softc *sc;
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vm_offset_t caoff;
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sc = device_get_softc(dev);
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caoff = sc->sc_data +
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(((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg);
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switch (width) {
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case 1:
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return (in8rb(caoff));
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break;
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case 2:
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return (in16rb(caoff));
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break;
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case 4:
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return (in32rb(caoff));
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break;
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}
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return (0xffffffff);
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}
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static void
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cpcpci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
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u_int reg, u_int32_t val, int width)
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{
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struct cpcpci_softc *sc;
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vm_offset_t caoff;
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sc = device_get_softc(dev);
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caoff = sc->sc_data +
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(((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg);
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switch (width) {
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case 1:
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out8rb(caoff, val);
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break;
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case 2:
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out16rb(caoff, val);
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break;
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case 4:
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out32rb(caoff, val);
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break;
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}
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}
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static int
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cpcpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct cpcpci_softc *sc;
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sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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*result = device_get_unit(dev);
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return (0);
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case PCIB_IVAR_BUS:
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*result = sc->sc_bus;
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return (0);
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}
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return (ENOENT);
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}
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static struct resource *
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cpcpci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct cpcpci_softc *sc;
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struct resource *rv;
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struct rman *rm;
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int needactivate;
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needactivate = flags & RF_ACTIVE;
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flags &= ~RF_ACTIVE;
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sc = device_get_softc(bus);
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switch (type) {
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case SYS_RES_MEMORY:
|
|
rm = &sc->sc_mem_rman;
|
|
break;
|
|
|
|
case SYS_RES_IOPORT:
|
|
rm = &sc->sc_io_rman;
|
|
if (rm == NULL)
|
|
return (NULL);
|
|
break;
|
|
|
|
case SYS_RES_IRQ:
|
|
return (bus_alloc_resource(bus, type, rid, start, end, count,
|
|
flags));
|
|
|
|
default:
|
|
device_printf(bus, "unknown resource request from %s\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
|
|
rv = rman_reserve_resource(rm, start, end, count, flags, child);
|
|
if (rv == NULL) {
|
|
device_printf(bus, "failed to reserve resource for %s\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
|
|
rman_set_rid(rv, *rid);
|
|
|
|
if (needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv) != 0) {
|
|
device_printf(bus,
|
|
"failed to activate resource for %s\n",
|
|
device_get_nameunit(child));
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
return (rv);
|
|
}
|
|
|
|
static int
|
|
cpcpci_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
void *p;
|
|
struct cpcpci_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_activate_resource(bus, type, rid, res));
|
|
|
|
if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
|
|
vm_offset_t start;
|
|
|
|
start = (vm_offset_t)rman_get_start(res);
|
|
/*
|
|
* For i/o-ports, convert the start address to the
|
|
* CPC PCI i/o window
|
|
*/
|
|
if (type == SYS_RES_IOPORT)
|
|
start += sc->sc_iostart;
|
|
|
|
if (bootverbose)
|
|
printf("cpcpci mapdev: start %x, len %ld\n", start,
|
|
rman_get_size(res));
|
|
|
|
p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
|
|
if (p == NULL)
|
|
return (ENOMEM);
|
|
rman_set_virtual(res, p);
|
|
rman_set_bustag(res, &bs_le_tag);
|
|
rman_set_bushandle(res, (u_long)p);
|
|
}
|
|
|
|
return (rman_activate_resource(res));
|
|
}
|
|
|
|
static phandle_t
|
|
cpcpci_get_node(device_t bus, device_t dev)
|
|
{
|
|
struct cpcpci_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
/* We only have one child, the PCI bus, which needs our own node. */
|
|
return (sc->sc_node);
|
|
}
|
|
|
|
static int
|
|
cpcpci_route_interrupt(device_t bus, device_t dev, int pin)
|
|
{
|
|
struct cpcpci_softc *sc;
|
|
struct ofw_pci_register reg;
|
|
uint32_t pintr, mintr;
|
|
uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
|
|
|
|
sc = device_get_softc(bus);
|
|
pintr = pin;
|
|
if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, ®,
|
|
sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), maskbuf))
|
|
return (mintr);
|
|
|
|
/* Maybe it's a real interrupt, not an intpin */
|
|
if (pin > 4)
|
|
return (pin);
|
|
|
|
device_printf(bus, "could not route pin %d for device %d.%d\n",
|
|
pin, pci_get_slot(dev), pci_get_function(dev));
|
|
return (PCI_INVALID_IRQ);
|
|
}
|
|
|