are used onboard in most of the newer PCI-based sun4u machines
(cosmetic change as they were also already probed as generic OHCI
without this). Detect whether their intpin register is valid and
correct it if necessary, i.e. set the respective IVAR to the right
value for allocating the IRQ resource, as some of them come up
having it set to 0 (mainly those used in Blade 100 and the first
one on AX1105 boards). This fixes attaching affected controllers.
Correcting the intpin value might be better off in the PCI code
via a quirk table but on the other hand gem(4) and hem(4) also
correct it themselves and at least for the USB controller part
the intpin register is truely hardwired to 0 and can't be changed.
This means that we would have to hook up the quirk information
in a lot of places in the PCI code (i.e. whenever the value of the
intpin register is read from or written to the pci_devinfo of the
respective device) in order to do it the right way.
MFC after: 1 month
2ef561e542