35b08f2f78
It used to be required that a device be a child of gpiobus(4) to manipulate gpio pins. That requirement didn't work well for FDT-based systems with many cross-hierarchy users of gpio, so a more modern framework was created that removed the old hierarchy requirement. These changes adapt the owc_gpiobus driver to use the newer gpio_pin_* functions to acquire, release, and manipulate gpio pins. This allows a single driver to work for both hinted-attachment and fdt-based systems, and removes the requirement that any one-wire fdt nodes must appear at the root of the devicetree. Differential Revision: https://reviews.freebsd.org/D22710
403 lines
10 KiB
C
403 lines
10 KiB
C
/*-
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* Copyright (c) 2015 M. Warner Losh <imp@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/ow/owll.h>
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#ifdef FDT
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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static struct ofw_compat_data compat_data[] = {
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{"w1-gpio", true},
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{NULL, false}
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};
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OFWBUS_PNP_INFO(compat_data);
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SIMPLEBUS_PNP_INFO(compat_data);
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#endif /* FDT */
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#define OW_PIN 0
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#define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define OWC_GPIOBUS_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
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"owc_gpiobus", MTX_DEF)
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#define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
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struct owc_gpiobus_softc
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{
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device_t sc_dev;
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gpio_pin_t sc_pin;
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struct mtx sc_mtx;
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};
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static int owc_gpiobus_probe(device_t);
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static int owc_gpiobus_attach(device_t);
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static int owc_gpiobus_detach(device_t);
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static int
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owc_gpiobus_probe(device_t dev)
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{
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int rv;
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/*
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* By default we only bid to attach if specifically added by our parent
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* (usually via hint.owc_gpiobus.#.at=busname). On FDT systems we bid
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* as the default driver based on being configured in the FDT data.
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*/
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rv = BUS_PROBE_NOWILDCARD;
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#ifdef FDT
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if (ofw_bus_status_okay(dev) &&
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ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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rv = BUS_PROBE_DEFAULT;
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#endif
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device_set_desc(dev, "GPIO one-wire bus");
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return (rv);
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}
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static int
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owc_gpiobus_attach(device_t dev)
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{
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struct owc_gpiobus_softc *sc;
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int err;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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#ifdef FDT
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/* Try to configure our pin from fdt data on fdt-based systems. */
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err = gpio_pin_get_by_ofw_idx(dev, ofw_bus_get_node(dev), OW_PIN,
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&sc->sc_pin);
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#else
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err = ENOENT;
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#endif
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/*
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* If we didn't get configured by fdt data and our parent is gpiobus,
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* see if we can be configured by the bus (allows hinted attachment even
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* on fdt-based systems).
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*/
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if (err != 0 &&
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strcmp("gpiobus", device_get_name(device_get_parent(dev))) == 0)
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err = gpio_pin_get_by_child_index(dev, OW_PIN, &sc->sc_pin);
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/* If we didn't get configured by either method, whine and punt. */
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if (err != 0) {
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device_printf(sc->sc_dev,
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"cannot acquire gpio pin (config error)\n");
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return (err);
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}
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OWC_GPIOBUS_LOCK_INIT(sc);
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/*
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* Add the ow bus as a child, but defer probing and attaching it until
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* interrupts work, because we can't do IO for them until we can read
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* the system timecounter (which initializes after device attachments).
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*/
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device_add_child(sc->sc_dev, "ow", -1);
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return (bus_delayed_attach_children(dev));
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}
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static int
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owc_gpiobus_detach(device_t dev)
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{
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struct owc_gpiobus_softc *sc;
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int err;
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sc = device_get_softc(dev);
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if ((err = device_delete_children(dev)) != 0)
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return (err);
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gpio_pin_release(sc->sc_pin);
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OWC_GPIOBUS_LOCK_DESTROY(sc);
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return (0);
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}
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/*
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* In the diagrams below, R is driven by the resistor pullup, M is driven by the
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* master, and S is driven by the slave / target.
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*/
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/*
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* These macros let what why we're doing stuff shine in the code
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* below, and let the how be confined to here.
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*/
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#define OUTPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_OUTPUT)
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#define INPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_INPUT)
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#define GETPIN(sc, bp) gpio_pin_is_active((sc)->sc_pin, (bp))
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#define LOW(sc) gpio_pin_set_active((sc)->sc_pin, false)
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/*
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* WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937
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*
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* |<---------tSLOT---->|<-tREC->|
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* High RRRRM | RRRRRRRRRRRR|RRRRRRRRM
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* M | R | | | M
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* M| R | | | M
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* Low MMMMMMM | | | MMMMMM...
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* |<-tLOW1->| | |
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* |<------15us--->| |
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* |<--------60us---->|
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*/
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static int
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owc_gpiobus_write_one(device_t dev, struct ow_timing *t)
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{
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struct owc_gpiobus_softc *sc;
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sc = device_get_softc(dev);
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critical_enter();
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/* Force low */
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OUTPIN(sc);
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LOW(sc);
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DELAY(t->t_low1);
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/* Allow resistor to float line high */
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INPIN(sc);
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DELAY(t->t_slot - t->t_low1 + t->t_rec);
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critical_exit();
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return (0);
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}
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/*
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* WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937
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*
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* |<---------tSLOT------>|<-tREC->|
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* High RRRRM | | |RRRRRRRM
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* M | | R M
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* M| | | |R M
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* Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM...
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* |<--15us->| | |
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* |<------60us--->| |
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* |<-------tLOW0------>|
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*/
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static int
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owc_gpiobus_write_zero(device_t dev, struct ow_timing *t)
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{
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struct owc_gpiobus_softc *sc;
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sc = device_get_softc(dev);
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critical_enter();
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/* Force low */
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OUTPIN(sc);
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LOW(sc);
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DELAY(t->t_low0);
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/* Allow resistor to float line high */
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INPIN(sc);
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DELAY(t->t_slot - t->t_low0 + t->t_rec);
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critical_exit();
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return (0);
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}
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/*
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* READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937
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*
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* |<---------tSLOT------>|<-tREC->|
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* High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM
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* M | r | R M
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* M| r | |R M
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* Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM...
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* |<tLOWR>< sample > |
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* |<------tRDV---->| |
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* ->| |<-tRELEASE
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*
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* r -- allowed to pull high via the resitor when slave writes a 1-bit
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*
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*/
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static int
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owc_gpiobus_read_data(device_t dev, struct ow_timing *t, int *bit)
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{
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struct owc_gpiobus_softc *sc;
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bool sample;
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sbintime_t then, now;
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sc = device_get_softc(dev);
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critical_enter();
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/* Force low for t_lowr microseconds */
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then = sbinuptime();
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OUTPIN(sc);
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LOW(sc);
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DELAY(t->t_lowr);
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/*
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* Slave is supposed to hold the line low for t_rdv microseconds for 0
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* and immediately float it high for a 1. This is measured from the
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* master's pushing the line low.
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*/
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INPIN(sc);
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do {
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now = sbinuptime();
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GETPIN(sc, &sample);
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} while (now - then < (t->t_rdv + 2) * SBT_1US && sample == false);
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critical_exit();
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if (now - then < t->t_rdv * SBT_1US)
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*bit = 1;
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else
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*bit = 0;
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/* Wait out the rest of t_slot */
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do {
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now = sbinuptime();
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} while (now - then < (t->t_slot + t->t_rec) * SBT_1US);
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return (0);
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}
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/*
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* RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937
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*
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* |<---------tRSTH------------>|
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* High RRRM | | RRRRRRRS | RRRR RRM
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* M | |R| |S | R M
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* M| R | | S |R M
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* Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM
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* |<----tRSTL--->| | |<-tPDL---->|
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* | ->| |<-tR | |
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* |<tPDH>|
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*
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* Note: for Regular Speed operations, tRSTL + tR should be less than 960us to
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* avoid interfering with other devices on the bus.
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*
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* Return values in *bit:
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* -1 = Bus wiring error (stuck low).
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* 0 = no presence pulse
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* 1 = presence pulse detected
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*/
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static int
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owc_gpiobus_reset_and_presence(device_t dev, struct ow_timing *t, int *bit)
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{
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struct owc_gpiobus_softc *sc;
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bool sample;
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sc = device_get_softc(dev);
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/*
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* Read the current state of the bus. The steady state of an idle bus is
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* high. Badly wired buses that are missing the required pull up, or
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* that have a short circuit to ground cause all kinds of mischief when
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* we try to read them later. Return EIO if the bus is currently low.
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*/
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INPIN(sc);
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GETPIN(sc, &sample);
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if (sample == false) {
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*bit = -1;
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return (EIO);
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}
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critical_enter();
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/* Force low */
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OUTPIN(sc);
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LOW(sc);
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DELAY(t->t_rstl);
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/* Allow resistor to float line high and then wait for reset pulse */
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INPIN(sc);
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DELAY(t->t_pdh + t->t_pdl / 2);
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/* Read presence pulse */
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GETPIN(sc, &sample);
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*bit = sample;
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critical_exit();
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DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */
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/*
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* Read the state of the bus after we've waited past the end of the rest
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* window. It should return to high. If it is low, then we have some
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* problem and should abort the reset.
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*/
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GETPIN(sc, &sample);
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if (sample == false) {
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*bit = -1;
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return (EIO);
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}
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return (0);
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}
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static devclass_t owc_gpiobus_devclass;
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static device_method_t owc_gpiobus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, owc_gpiobus_probe),
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DEVMETHOD(device_attach, owc_gpiobus_attach),
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DEVMETHOD(device_detach, owc_gpiobus_detach),
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DEVMETHOD(owll_write_one, owc_gpiobus_write_one),
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DEVMETHOD(owll_write_zero, owc_gpiobus_write_zero),
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DEVMETHOD(owll_read_data, owc_gpiobus_read_data),
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DEVMETHOD(owll_reset_and_presence, owc_gpiobus_reset_and_presence),
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{ 0, 0 }
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};
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static driver_t owc_gpiobus_driver = {
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"owc",
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owc_gpiobus_methods,
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sizeof(struct owc_gpiobus_softc),
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};
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#ifdef FDT
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DRIVER_MODULE(owc_gpiobus, simplebus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0);
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#endif
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DRIVER_MODULE(owc_gpiobus, gpiobus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0);
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MODULE_DEPEND(owc_gpiobus, ow, 1, 1, 1);
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MODULE_DEPEND(owc_gpiobus, gpiobus, 1, 1, 1);
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MODULE_VERSION(owc_gpiobus, 1);
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