br 69f1ecb8f8 Allow setting access-width for UART registers. ... This is required for FDT's standard "reg-io-width" property (similar to "reg-shift" property) found in many DTS files. This fixes operation on Altera Arria 10 SOC Development Kit, where standard ns8250 uart allows 4-byte access only. Reviewed by: kan, marcel Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D9785		2017-02-27 20:08:42 +00:00
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alchemy_machdep.c
aureg.h
files.alchemy
obio.c	Remove NULL checks after M_WAITOK allocations from sys/mips/.	2016-05-11 09:42:24 +00:00
std.alchemy
uart_bus_alchemy.c	Allow setting access-width for UART registers.	2017-02-27 20:08:42 +00:00
uart_cpu_alchemy.c