df4d502619
changes: 01 - Enhanced LRO: LRO feature is extended to support multi-buffer mode. Previously, Ethernet frames received in contiguous buffers were offloaded. Now, frames received in multiple non-contiguous buffers can be offloaded, as well. The driver now supports LRO for jumbo frames. 02 - Locks Optimization: The driver code was re-organized to limit the use of locks. Moreover, lock contention was reduced by replacing wait locks with try locks. 03 - Code Optimization: The driver code was re-factored to eliminate some memcpy operations. Fast path loops were optimized. 04 - Tag Creations: Physical Buffer Tags are now optimized based upon frame size. For better performance, Physical Memory Maps are now re-used. 05 - Configuration: Features such as TSO, LRO, and Interrupt Mode can be configured either at load or at run time. Rx buffer mode (mode 1 or mode 2) can be configured at load time through kenv. 06 - Driver Statistics: Run time statistics are enhanced to provide better visibility into the driver performance. 07 - Bug Fixes: The driver contains fixes for the problems discovered and reported since last submission. 08 - MSI support: Added Message Signaled Interrupt feature which currently uses 1 message. 09 Removed feature: Rx 3 buffer mode feature has been removed. Driver now supports 1, 2 and 5 buffer modes of which 2 and 5 buffer modes can be used for header separation. 10 Compiler warning: Fixed compiler warning when compiled for 32 bit system. 11 Copyright notice: Source files are updated with the proper copyright notice. MFC after: 3 days Submitted by: Alicia Pena <Alicia dot Pena at neterion dot com>, Muhammad Shafiq <Muhammad dot Shafiq at neterion dot com>
221 lines
6.8 KiB
C
221 lines
6.8 KiB
C
/*-
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* Copyright (c) 2002-2007 Neterion, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef XGE_HAL_MGMT_H
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#define XGE_HAL_MGMT_H
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#include <dev/nxge/include/xge-os-pal.h>
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#include <dev/nxge/include/xge-debug.h>
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#include <dev/nxge/include/xgehal-types.h>
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#include <dev/nxge/include/xgehal-config.h>
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#include <dev/nxge/include/xgehal-stats.h>
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#include <dev/nxge/include/xgehal-regs.h>
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#include <dev/nxge/include/xgehal-device.h>
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__EXTERN_BEGIN_DECLS
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/**
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* struct xge_hal_mgmt_about_info_t - About info.
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* @vendor: PCI Vendor ID.
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* @device: PCI Device ID.
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* @subsys_vendor: PCI Subsystem Vendor ID.
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* @subsys_device: PCI Subsystem Device ID.
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* @board_rev: PCI Board revision, e.g. 3 - for Xena 3.
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* @vendor_name: Neterion, Inc.
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* @chip_name: Xframe.
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* @media: Fiber, copper.
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* @hal_major: HAL major version number.
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* @hal_minor: HAL minor version number.
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* @hal_fix: HAL fix number.
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* @hal_build: HAL build number.
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* @ll_major: Link-layer ULD major version number.
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* @ll_minor: Link-layer ULD minor version number.
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* @ll_fix: Link-layer ULD fix version number.
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* @ll_build: Link-layer ULD build number.
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* @transponder_temperature: TODO
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*/
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typedef struct xge_hal_mgmt_about_info_t {
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u16 vendor;
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u16 device;
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u16 subsys_vendor;
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u16 subsys_device;
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u8 board_rev;
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char vendor_name[16];
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char chip_name[16];
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char media[16];
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char hal_major[4];
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char hal_minor[4];
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char hal_fix[4];
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char hal_build[16];
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char ll_major[4];
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char ll_minor[4];
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char ll_fix[4];
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char ll_build[16];
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u32 transponder_temperature;
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} xge_hal_mgmt_about_info_t;
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typedef xge_hal_stats_hw_info_t xge_hal_mgmt_hw_stats_t;
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typedef xge_hal_stats_pcim_info_t xge_hal_mgmt_pcim_stats_t;
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typedef xge_hal_stats_sw_err_t xge_hal_mgmt_sw_stats_t;
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typedef xge_hal_stats_device_info_t xge_hal_mgmt_device_stats_t;
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typedef xge_hal_stats_channel_info_t xge_hal_mgmt_channel_stats_t;
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typedef xge_hal_device_config_t xge_hal_mgmt_device_config_t;
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typedef xge_hal_driver_config_t xge_hal_mgmt_driver_config_t;
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typedef xge_hal_pci_config_t xge_hal_mgmt_pci_config_t;
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xge_hal_status_e
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xge_hal_mgmt_about(xge_hal_device_h devh, xge_hal_mgmt_about_info_t *about_info,
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int size);
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xge_hal_status_e
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xge_hal_mgmt_hw_stats(xge_hal_device_h devh, xge_hal_mgmt_hw_stats_t *hw_stats,
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int size);
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xge_hal_status_e
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xge_hal_mgmt_hw_stats_off(xge_hal_device_h devh, int off, int size, char *out);
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xge_hal_status_e
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xge_hal_mgmt_pcim_stats(xge_hal_device_h devh,
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xge_hal_mgmt_pcim_stats_t *pcim_stats, int size);
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xge_hal_status_e
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xge_hal_mgmt_pcim_stats_off(xge_hal_device_h devh, int off, int size,
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char *out);
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xge_hal_status_e
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xge_hal_mgmt_sw_stats(xge_hal_device_h devh, xge_hal_mgmt_sw_stats_t *hw_stats,
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int size);
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xge_hal_status_e
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xge_hal_mgmt_device_stats(xge_hal_device_h devh,
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xge_hal_mgmt_device_stats_t *device_stats, int size);
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xge_hal_status_e
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xge_hal_mgmt_channel_stats(xge_hal_channel_h channelh,
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xge_hal_mgmt_channel_stats_t *channel_stats, int size);
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xge_hal_status_e
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xge_hal_mgmt_reg_read(xge_hal_device_h devh, int bar_id, unsigned int offset,
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u64 *value);
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xge_hal_status_e
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xge_hal_mgmt_reg_write(xge_hal_device_h devh, int bar_id, unsigned int offset,
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u64 value);
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xge_hal_status_e
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xge_hal_mgmt_pcireg_read(xge_hal_device_h devh, unsigned int offset,
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int bits, u32 *value);
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xge_hal_status_e
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xge_hal_mgmt_device_config(xge_hal_device_h devh,
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xge_hal_mgmt_device_config_t *dev_config, int size);
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xge_hal_status_e
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xge_hal_mgmt_driver_config(xge_hal_mgmt_driver_config_t *drv_config,
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int size);
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xge_hal_status_e
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xge_hal_mgmt_pci_config(xge_hal_device_h devh,
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xge_hal_mgmt_pci_config_t *pci_config, int size);
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xge_hal_status_e
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xge_hal_pma_loopback( xge_hal_device_h devh, int enable );
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xge_hal_status_e
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xge_hal_rldram_test(xge_hal_device_h devh, u64 * data);
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u16
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xge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr );
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xge_hal_status_e
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xge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value );
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u32
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xge_hal_read_xfp_current_temp(xge_hal_device_h devh);
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xge_hal_status_e
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xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data);
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xge_hal_status_e
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xge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt);
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xge_hal_status_e
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xge_hal_register_test(xge_hal_device_h devh, u64 *data);
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xge_hal_status_e
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xge_hal_eeprom_test(xge_hal_device_h devh, u64 *data);
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xge_hal_status_e
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xge_hal_bist_test(xge_hal_device_h devh, u64 *data);
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xge_hal_status_e
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xge_hal_link_test(xge_hal_device_h devh, u64 *data);
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int
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xge_hal_setpause_data(xge_hal_device_h devh, int tx, int rx);
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void
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xge_hal_getpause_data(xge_hal_device_h devh, int *tx, int *rx);
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void
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__hal_updt_stats_xpak(xge_hal_device_t *hldev);
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void
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__hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value);
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#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
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xge_hal_status_e
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xge_hal_mgmt_trace_read(char *buffer, unsigned buf_size, unsigned *offset,
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unsigned *read_length);
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#endif
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void
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xge_hal_restore_link_led(xge_hal_device_h devh);
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void
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xge_hal_flick_link_led(xge_hal_device_h devh);
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/*
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* Some set of Xena3 Cards were known to have some link LED
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* Problems. This macro identifies if the card is among them
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* given its Sub system ID.
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*/
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#define CARDS_WITH_FAULTY_LINK_INDICATORS(subid) \
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((((subid >= 0x600B) && (subid <= 0x600D)) || \
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((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0)
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#define CHECKBIT(value, nbit) (value & (1 << nbit))
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#ifdef XGE_HAL_USE_MGMT_AUX
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#include <dev/nxge/include/xgehal-mgmtaux.h>
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#endif
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__EXTERN_END_DECLS
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#endif /* XGE_HAL_MGMT_H */
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