33f088cfc9
accomplishes a few things: - Makes NULL an invalid address in the kernel, which is useful for catching bugs. - Lays groundwork for radix-tree translation on POWER9, which requires the direct map be at high memory. - Similarly lays groundwork for a direct map on 64-bit Book-E. The new base address is chosen as the base of the fourth radix quadrant (the minimum kernel address in this translation mode) and because all supported CPUs ignore at least the first two bits of addresses in real mode, allowing direct-map addresses to be used in real-mode handlers. This is required by Linux and is part of the architecture standard starting in POWER ISA 3, so can be relied upon. Reviewed by: jhibbits, Breno Leitao Differential Revision: D14499
286 lines
7.2 KiB
C
286 lines
7.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2010 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/reboot.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/hid.h>
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#include <machine/platform.h>
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#include <machine/platformvar.h>
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#include <machine/smp.h>
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#include <machine/spr.h>
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#include <machine/vmparam.h>
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#include <dev/ofw/openfirm.h>
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#include "platform_if.h"
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#include "ps3-hvcall.h"
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#ifdef SMP
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extern void *ap_pcpu;
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#endif
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static int ps3_probe(platform_t);
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static int ps3_attach(platform_t);
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static void ps3_mem_regions(platform_t, struct mem_region *phys, int *physsz,
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struct mem_region *avail, int *availsz);
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static vm_offset_t ps3_real_maxaddr(platform_t);
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static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref);
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#ifdef SMP
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static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref);
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static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref);
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static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref);
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static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu);
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static struct cpu_group *ps3_smp_topo(platform_t);
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#endif
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static void ps3_reset(platform_t);
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static void ps3_cpu_idle(sbintime_t);
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static platform_method_t ps3_methods[] = {
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PLATFORMMETHOD(platform_probe, ps3_probe),
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PLATFORMMETHOD(platform_attach, ps3_attach),
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PLATFORMMETHOD(platform_mem_regions, ps3_mem_regions),
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PLATFORMMETHOD(platform_real_maxaddr, ps3_real_maxaddr),
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PLATFORMMETHOD(platform_timebase_freq, ps3_timebase_freq),
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#ifdef SMP
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PLATFORMMETHOD(platform_smp_first_cpu, ps3_smp_first_cpu),
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PLATFORMMETHOD(platform_smp_next_cpu, ps3_smp_next_cpu),
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PLATFORMMETHOD(platform_smp_get_bsp, ps3_smp_get_bsp),
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PLATFORMMETHOD(platform_smp_start_cpu, ps3_smp_start_cpu),
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PLATFORMMETHOD(platform_smp_topo, ps3_smp_topo),
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#endif
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PLATFORMMETHOD(platform_reset, ps3_reset),
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PLATFORMMETHOD_END
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};
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static platform_def_t ps3_platform = {
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"ps3",
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ps3_methods,
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0
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};
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PLATFORM_DEF(ps3_platform);
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static int ps3_boot_pir = 0;
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static int
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ps3_probe(platform_t plat)
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{
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phandle_t root;
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char compatible[64];
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root = OF_finddevice("/");
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if (OF_getprop(root, "compatible", compatible, sizeof(compatible)) <= 0)
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return (BUS_PROBE_NOWILDCARD);
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if (strncmp(compatible, "sony,ps3", sizeof(compatible)) != 0)
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return (BUS_PROBE_NOWILDCARD);
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return (BUS_PROBE_SPECIFIC);
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}
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static int
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ps3_attach(platform_t plat)
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{
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pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC);
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cpu_idle_hook = ps3_cpu_idle;
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/* Record our PIR at boot for later */
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ps3_boot_pir = mfspr(SPR_PIR);
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return (0);
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}
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void
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ps3_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
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struct mem_region *avail_regions, int *availsz)
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{
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uint64_t lpar_id, junk;
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int i;
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/* Prefer device tree information if available */
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if (OF_finddevice("/") != -1) {
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ofw_mem_regions(phys, physsz, avail_regions, availsz);
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} else {
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/* Real mode memory region is first segment */
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phys[0].mr_start = 0;
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phys[0].mr_size = ps3_real_maxaddr(plat);
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*physsz = *availsz = 1;
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avail_regions[0] = phys[0];
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}
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/* Now get extended memory region */
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lv1_get_logical_partition_id(&lpar_id);
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lv1_get_repository_node_value(lpar_id,
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lv1_repository_string("bi") >> 32,
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lv1_repository_string("rgntotal"), 0, 0,
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&phys[*physsz].mr_size, &junk);
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for (i = 0; i < *physsz; i++)
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phys[*physsz].mr_size -= phys[i].mr_size;
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/* Convert to maximum amount we can allocate in 16 MB pages */
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phys[*physsz].mr_size -= phys[*physsz].mr_size % (16*1024*1024);
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/* Allocate extended memory region */
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lv1_allocate_memory(phys[*physsz].mr_size, 24 /* 16 MB pages */,
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0, 0x04 /* any address */, &phys[*physsz].mr_start, &junk);
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avail_regions[*availsz] = phys[*physsz];
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(*physsz)++;
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(*availsz)++;
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}
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static u_long
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ps3_timebase_freq(platform_t plat, struct cpuref *cpuref)
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{
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uint64_t ticks, node_id, junk;
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lv1_get_repository_node_value(PS3_LPAR_ID_PME,
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lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk);
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lv1_get_repository_node_value(PS3_LPAR_ID_PME,
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lv1_repository_string("be") >> 32, node_id,
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lv1_repository_string("clock"), 0, &ticks, &junk);
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return (ticks);
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}
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#ifdef SMP
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static int
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ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
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{
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cpuref->cr_cpuid = 0;
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cpuref->cr_hwref = ps3_boot_pir;
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return (0);
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}
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static int
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ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
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{
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if (cpuref->cr_cpuid >= 1)
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return (ENOENT);
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cpuref->cr_cpuid++;
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cpuref->cr_hwref = !ps3_boot_pir;
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return (0);
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}
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static int
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ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
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{
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cpuref->cr_cpuid = 0;
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cpuref->cr_hwref = ps3_boot_pir;
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return (0);
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}
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static int
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ps3_smp_start_cpu(platform_t plat, struct pcpu *pc)
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{
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/* kernel is spinning on 0x40 == -1 right now */
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volatile uint32_t *secondary_spin_sem =
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(uint32_t *)PHYS_TO_DMAP((uintptr_t)0x40);
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int remote_pir = pc->pc_hwref;
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int timeout;
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ap_pcpu = pc;
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/* Try both PIR values, looping a few times: the HV likes moving us */
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timeout = 10000;
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while (!pc->pc_awake && timeout--) {
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*secondary_spin_sem = remote_pir;
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powerpc_sync();
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DELAY(100);
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remote_pir = !remote_pir;
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}
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return ((pc->pc_awake) ? 0 : EBUSY);
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}
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static struct cpu_group *
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ps3_smp_topo(platform_t plat)
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{
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return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT));
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}
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#endif
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static void
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ps3_reset(platform_t plat)
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{
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lv1_panic(1);
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}
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static vm_offset_t
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ps3_real_maxaddr(platform_t plat)
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{
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uint64_t lpar_id, junk, ppe_id;
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static uint64_t rm_maxaddr = 0;
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if (rm_maxaddr == 0) {
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/* Get real mode memory region */
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lv1_get_logical_partition_id(&lpar_id);
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lv1_get_logical_ppe_id(&ppe_id);
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lv1_get_repository_node_value(lpar_id,
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lv1_repository_string("bi") >> 32,
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lv1_repository_string("pu"),
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ppe_id, lv1_repository_string("rm_size"),
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&rm_maxaddr, &junk);
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}
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return (rm_maxaddr);
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}
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static void
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ps3_cpu_idle(sbintime_t sbt)
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{
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lv1_pause(0);
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}
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